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Subject: Re: [PATCH 1/2] MIPS: Allow MIPS32R2 kernel to run on P5600 and M5150
From:   Jiaxun Yang <jiaxun.yang@flygoat.com>
In-Reply-To: <alpine.DEB.2.21.2305301315120.42601@angie.orcam.me.uk>
Date:   Tue, 30 May 2023 14:10:04 +0100
Cc:     Paul Cercueil <paul@crapouillou.net>,
        "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
        linux-kernel@vger.kernel.org,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Message-Id: <5CC33034-4AF3-4522-9942-8BCCEF1086AE@flygoat.com>
References: <20230529135245.4085-1-jiaxun.yang@flygoat.com>
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To:     "Maciej W. Rozycki" <macro@orcam.me.uk>
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> 2023=E5=B9=B45=E6=9C=8830=E6=97=A5 13:16=EF=BC=8CMaciej W. Rozycki =
<macro@orcam.me.uk> =E5=86=99=E9=81=93=EF=BC=9A
>=20
> On Tue, 30 May 2023, Jiaxun Yang wrote:
>=20
>>> Sure, but this change is not needed for it.  You just need to =
declare=20
>>> which ISA revisions your platform supports and leave =
`__get_cpu_type'=20
>>> alone.  It has worked like that for a decade now.
>>=20
>> I=E2=80=99m afraid it won=E2=80=99t work as you expected.
>>=20
>> Actually I ran into a problem that `case CPU_P5600` in c-r4k.c is =
optimised out
>> by compiler, because the codepath is marked as unreachable.
>=20
> Maybe there's a bug elsewhere then.  Send me your .config and I'll try =
to=20
> reproduce it.

Ok I see the problem, after applying patch 2 the issue is gone.
So actually only patch 2 is necessary.

The unreachable mark here leads gcc to generate some confusing code
and I misread it.

Sorry for the noise.

Thanks
- Jiaxun

>=20
>  Maciej