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From:   Thomas Gleixner <tglx@linutronix.de>
To:     Huacai Chen <chenhuacai@gmail.com>
Cc:     Marc Zyngier <maz@kernel.org>,
        Huacai Chen <chenhuacai@loongson.cn>,
        Bjorn Helgaas <bhelgaas@google.com>,
        linux-kernel@vger.kernel.org, loongson-kernel@lists.loongnix.cn,
        Xuefeng Li <lixuefeng@loongson.cn>,
        Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: Re: [PATCH 1/2] genirq/msi, platform-msi: Adjust return value of
 msi_domain_prepare_irqs()
In-Reply-To: <CAAhV-H6uZWgZQsVh=1-U2B4ZZZz6EPJ3gkv0mxHSNGOMPB=VwQ@mail.gmail.com>
Date:   Tue, 30 May 2023 17:03:56 +0200
Message-ID: <87zg5lj1yb.ffs@tglx>
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On Tue, May 30 2023 at 16:34, Huacai Chen wrote:
> On Tue, May 30, 2023 at 4:19=E2=80=AFAM Thomas Gleixner <tglx@linutronix.=
de> wrote:
>> Let's take a step back and look at the larger picture:
>>
>>  1) A PCI/MSI irqdomain is attached to a PCI bus
>>
>>  2) The number of PCI devices on that PCI bus is usually known at boot
>>     time _before_ the first device driver is probed.
>>
>>     That's not entirely true for PCI hotplug devices, but that's hardly
>>     relevant for an architecture which got designed less than 10 years
>>     ago and the architects decided that 256 MSI vectors are good enough
>>     for up to 256 CPUs. The concept of per CPU queues was already known
>>     at that time, no?
> Does this solution depend on the per-device msi domain? Can we do that
> if we use the global msi domain?

In principle it should not depend on per-device MSI domains, but I
really don't want to add new functionality to the old operating models
as that does not create an incentive for people to convert their stuff
over.

>> So the irqdomain can tell the PCI/MSI core the maximum number of vectors
>> available for a particular bus, right?
>>
>> The default, i.e if the irqdomain does not expose that information,
>> would be "unlimited", i.e. ULONG_MAX.
> OK, thanks, but how to expose? By msi_domain_info::hwsize?

Probably. Needs a proper helper around it.

Thanks,

        tglx