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Shutemov" , LKML , x86@kernel.org, David Woodhouse , Andrew Cooper , Brian Gerst , Arjan van de Veen , Paolo Bonzini , Paul McKenney , Oleksandr Natalenko , Paul Menzel , "Guilherme G. Piccoli" , Piotr Gorski , Usama Arif , Juergen Gross , Boris Ostrovsky , xen-devel@lists.xenproject.org, Russell King , Arnd Bergmann , linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Guo Ren , linux-csky@vger.kernel.org, Thomas Bogendoerfer , linux-mips@vger.kernel.org, "James E.J. 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From a semantical POV making this decision about parallel >>> bootup based on some magic CC encryption attribute is questionable. >>> >>> I'm tending to just do the below and make this CC agnostic (except that >>> I couldn't find the right spot for SEV-ES to clear that flag.) >> >> Maybe in sme_sev_setup_real_mode() in arch/x86/realmode/init.c? You could >> clear the flag within the CC_ATTR_GUEST_STATE_ENCRYPT check. > > Eeew. > > Can we please have a AMD SEV-ES init specific place and not hijack some > random code which has to check CC_ATTR_GUEST_STATE_ENCRYPT? As long as it's not too early, you could try sme_early_init() in arch/x86/mm/mem_encrypt_amd.c. Add a check for sev_status & MSR_AMD64_SEV_ES_ENABLED and clear the flag. Thanks, Tom > > Thanks, > > tglx