Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Tue, 30 May 2023 16:00:07 -0700
From:   Isaku Yamahata <isaku.yamahata@gmail.com>
To:     Like Xu <like.xu.linux@gmail.com>
Cc:     Isaku Yamahata <isaku.yamahata@gmail.com>,
        Zhi Wang <zhi.wang.linux@gmail.com>, isaku.yamahata@intel.com,
        kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
        Paolo Bonzini <pbonzini@redhat.com>, erdemaktas@google.com,
        Sean Christopherson <seanjc@google.com>,
        Sagi Shahar <sagis@google.com>,
        David Matlack <dmatlack@google.com>,
        Kai Huang <kai.huang@intel.com>
Subject: Re: [PATCH v13 021/113] KVM: TDX: Make pmu_intel.c ignore guest TD
 case
Message-ID: <20230530230007.GF1234772@ls.amr.corp.intel.com>
References: <cover.1678643051.git.isaku.yamahata@intel.com>
 <017a06174fa054ae264a2caba6f7f55e00f258e8.1678643052.git.isaku.yamahata@intel.com>
 <20230402115019.000046fd@gmail.com>
 <36fb638a-c9ff-0139-3e8e-7e8ff0bbff1f@gmail.com>
 <20230528082602.GC1234772@ls.amr.corp.intel.com>
 <cd8b6ea4-1293-c57c-1bed-4f6dbdbc2722@gmail.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Disposition: inline
In-Reply-To: <cd8b6ea4-1293-c57c-1bed-4f6dbdbc2722@gmail.com>
Precedence: bulk

On Mon, May 29, 2023 at 10:19:16PM +0800,
Like Xu <like.xu.linux@gmail.com> wrote:

> On 28/5/2023 4:26 pm, Isaku Yamahata wrote:
> > On Wed, Apr 19, 2023 at 04:21:21PM +0800,
> > Like Xu <like.xu.linux@gmail.com> wrote:
> > 
> > > On 2/4/2023 4:50 pm, Zhi Wang wrote:
> > > > Hi Like:
> > > > 
> > > > Would you mind to take a look on this patch? It would be nice to have
> > > > a r-b also from you. :)
> > > > 
> > > > On Sun, 12 Mar 2023 10:55:45 -0700
> > > > isaku.yamahata@intel.com wrote:
> > > > 
> > > > > From: Isaku Yamahata <isaku.yamahata@intel.com>
> > > > > 
> > > > > Because TDX KVM doesn't support PMU yet (it's future work of TDX KVM
> > > > > support as another patch series) and pmu_intel.c touches vmx specific
> > > 
> > > It would be nice to have pmu support for tdx-guest from the very beginning.
> > 
> > It's supported in the public github repo.
> > https://github.com/intel/tdx/tree/kvm-upstream-workaround
> > As this patch series has 100+ patches, I don't want to bloat this patch more.
> 
> I presume we are talking about 873e2391e729...63761adbf5aa for TD pmu:
> 
> A quick glance brought me at least these comments:
> 
> (1) how does intel_pmu_save/restore() handle the enabled host LBR/PEBS ?

It's not handled yet. We need to save/restore those MSRs.


> (2) guest PMI injection may be malicious and could the current guest pmu
> driver handle it ?

This isn't specific to PMI.  Malicious VMM can inject any interrupt to the
guest at any time.  Guest should be prepared for it.


> (3) how do we handle the case when host counters can be enabled before TDENTER
> for debuggable TD and support the case like "perf-kvm for both guest and host" ?

On TDEXIT, those are disabled. VMM has to restore MSRs and enable it again.
There is a window where events can be missed.


> My point is actually, changes to perf/core should be CC to the perf reviewers
> as early as possible to prevent key player from killing the direction.

Sure, agreed.


> > > > > structure in vcpu initialization, as workaround add dummy structure to
> > > > > struct vcpu_tdx and pmu_intel.c can ignore TDX case.
> > > 
> > > If the target is not to provide a workaround, how about other variants:
> > > 	- struct lbr_desc lbr_desc;
> > > 	- pebs ds_buffer;
> > > ?
> > > 
> > > We also need tdx selftest to verify the unavailability of these features.
> > > Also, it would be great to have TDX's "System Profiling Mode" featue back in
> > > the specification.
> 
> Detailed TD (plus debuggable) PMU selftest would clearly speed up the review
> process.

The existing KVM PMU selftest can be utilized. Or do you have something else in
mind?

-- 
Isaku Yamahata <isaku.yamahata@gmail.com>