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Date:   Wed, 31 May 2023 12:21:44 -0500
From:   Bjorn Helgaas <helgaas@kernel.org>
To:     Zhu YiXin <yzhu@maxlinear.com>
Cc:     lchuanhua@maxlinear.com, torvalds@linux-foundation.org,
        linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
        pliem@maxlinear.com, qwu@maxlinear.com,
        Rahul Tanwar <rahul_tanwar@yahoo.com>
Subject: Re: [PATCH v2 1/1] MAINTAINERS: Update entry for PCIe driver for
 Intel LGM GW SoC
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[+cc Rahul]

On Fri, May 19, 2023 at 12:45:55PM +0800, Zhu YiXin wrote:
> Rahul Tanwar is no longer at Maxlinear, so update the MAINTAINER's entry
> for the PCIe driver for Intel LGM GW SoC.
> 
> Signed-off-by: Zhu YiXin <yzhu@maxlinear.com>

Applied with acks from Rahul Tanwar and Lei Chuanhua to for-linus for
v6.4, thanks!

> ---
>  MAINTAINERS | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c8d274efff10..6091bbb0e1d7 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -16383,7 +16383,7 @@ F:	Documentation/devicetree/bindings/pci/intel,keembay-pcie*
>  F:	drivers/pci/controller/dwc/pcie-keembay.c
>  
>  PCIE DRIVER FOR INTEL LGM GW SOC
> -M:	Rahul Tanwar <rtanwar@maxlinear.com>
> +M:	Chuanhua Lei <lchuanhua@maxlinear.com>
>  L:	linux-pci@vger.kernel.org
>  S:	Maintained
>  F:	Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
> -- 
> 2.17.1
>