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Wed, 31 May 2023 16:51:45 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34VLpjBm109874; Wed, 31 May 2023 16:51:45 -0500 Date: Wed, 31 May 2023 16:51:45 -0500 From: Nishanth Menon To: Udit Kumar CC: , , , , , , , , Subject: Re: [PATCH 1/5] arm64: dts: ti: k3-j7200: Add general purpose timers Message-ID: <20230531215145.a6xiurql6jtvbr3y@filling> References: <20230426103219.1565266-1-u-kumar1@ti.com> <20230426103219.1565266-2-u-kumar1@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20230426103219.1565266-2-u-kumar1@ti.com> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16:02-20230426, Udit Kumar wrote: [..] > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi > index ef352e32f19d..555bde0e7fda 100644 > --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi [...] > + main_timer13: timer@24d0000 { > + compatible = "ti,am654-timer"; > + reg = <0x00 0x24d0000 0x00 0x400>; > + interrupts = ; > + clocks = <&k3_clks 63 1>; > + clock-names = "fck"; > + assigned-clocks = <&k3_clks 63 1>; > + assigned-clock-parents = <&k3_clks 63 2>; > + power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>; ^^ I think you need to use device ID 64 here instead of 63 for the node Also for odd numbered timers, we need to set the TIMERx_CLKSEL_VD explicitly for J7200, unfortunately the IDs are different from J721e, preventing re-use :( Example: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j7200/clocks.html#clocks-for-timer1-device https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j7200/clocks.html#clocks-for-timer1-clksel-vd-device > + ti,timer-pwm; > + }; [...] > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > index 331b4e482e41..1c09e442b379 100644 > --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > @@ -34,6 +34,126 @@ k3_reset: reset-controller { > }; > }; [...] > + mcu_timer6: timer@40460000 { > + compatible = "ti,am654-timer"; > + reg = <0x00 0x40460000 0x00 0x400>; > + interrupts = ; > + clocks = <&k3_clks 76 1>; > + clock-names = "fck"; > + assigned-clocks = <&k3_clks 76 1>; > + assigned-clock-parents = <&k3_clks 76 2>; > + power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>; I think this needs to be 76 instead of 35 > + ti,timer-pwm; > + }; > + -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D