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[49.179.0.188]) by smtp.gmail.com with ESMTPSA id jd5-20020a170903260500b001a245b49731sm1908603plb.128.2023.05.31.15.30.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 May 2023 15:30:50 -0700 (PDT) Received: from dave by dread.disaster.area with local (Exim 4.96) (envelope-from ) id 1q4ULA-006HBu-12; Thu, 01 Jun 2023 08:30:48 +1000 Date: Thu, 1 Jun 2023 08:30:48 +1000 From: Dave Chinner To: "Chen, Zhiyin" Cc: Eric Biggers , Christian Brauner , "viro@zeniv.linux.org.uk" , "linux-fsdevel@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "Zou, Nanhai" , "Feng, Xiaotian" Subject: Re: [PATCH] fs.h: Optimize file struct to prevent false sharing Message-ID: References: <20230530020626.186192-1-zhiyin.chen@intel.com> <20230530-wortbruch-extra-88399a74392e@brauner> <20230531015549.GA1648@quark.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 31, 2023 at 10:31:09AM +0000, Chen, Zhiyin wrote: > As Eric said, CONFIG_RANDSTRUCT_NONE is set in the default config > and some production environments, including Ali Cloud. Therefore, it > is worthful to optimize the file struct layout. > > Here are the syscall test results of unixbench. Results look good, but the devil is in the detail.... > Command: numactl -C 3-18 ./Run -c 16 syscall So the test is restricted to a set of adjacent cores within a single CPU socket, so all the cachelines are typically being shared within a single socket's CPU caches. IOWs, the fact there are 224 CPUs in the machine is largely irrelevant for this microbenchmark. i.e. is this a microbenchmark that is going faster simply because the working set for the specific benchmark now fits in L2 or L3 cache when it didn't before? Does this same result occur for different CPUs types, cache sizes and architectures? What about when the cores used by the benchmark are spread across mulitple sockets so the cost of remote cacheline access is taken into account? If this is actually a real benefit, then we should see similar or even larger gains between CPU cores that are further apart because the cost of false cacheline sharing are higher in those systems.... > Without patch > ------------------------ > 224 CPUs in system; running 16 parallel copies of tests > System Call Overhead 5611223.7 lps (10.0 s, 7 samples) > System Benchmarks Partial Index BASELINE RESULT INDEX > System Call Overhead 15000.0 5611223.7 3740.8 > ======== > System Benchmarks Index Score (Partial Only) 3740.8 > > With patch > ------------------------------------------------------------------------ > 224 CPUs in system; running 16 parallel copies of tests > System Call Overhead 7567076.6 lps (10.0 s, 7 samples) > System Benchmarks Partial Index BASELINE RESULT INDEX > System Call Overhead 15000.0 7567076.6 5044.7 > ======== > System Benchmarks Index Score (Partial Only) 5044.7 Where is all this CPU time being saved? Do you have a profile showing what functions in the kernel are running far more efficiently now? Yes, the results look good, but if all this change is doing is micro-optimising a single code path, it's much less impressive and far more likley that it has no impact on real-world performance... More information, please! -Dave. -- Dave Chinner david@fromorbit.com