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Message-ID: <9d24d50e-f5d1-f08c-1318-46497cec293d@starfivetech.com>
Date:   Thu, 1 Jun 2023 09:52:38 +0800
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Subject: Re: [PATCH v1 2/3] spi: cadence-quadspi: Add clock configuration for
 StarFive JH7110 QSPI
To:     Mark Brown <broonie@kernel.org>
CC:     <devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
        "Rob Herring" <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        "Emil Renner Berthing" <kernel@esmil.dk>,
        Ziv Xu <ziv.xu@starfivetech.com>
References: <20230526062529.46747-1-william.qiu@starfivetech.com>
 <20230526062529.46747-3-william.qiu@starfivetech.com>
 <fecc9d6a-022e-49d9-a452-8a63c409ebf3@sirena.org.uk>
 <042c560d-1f36-8e97-3796-7423245592f4@starfivetech.com>
 <86555925-b8dd-29a8-60cd-5c2ff2c1432a@starfivetech.com>
 <eb68722b-bcab-4aa1-aa4e-54bfe95ef414@sirena.org.uk>
 <93ba0b97-45aa-e59d-1454-80c4f245acc0@starfivetech.com>
 <075db1ba-e15c-4c3c-9430-99c866eca24d@sirena.org.uk>
Content-Language: en-US
From:   William Qiu <william.qiu@starfivetech.com>
In-Reply-To: <075db1ba-e15c-4c3c-9430-99c866eca24d@sirena.org.uk>
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On 2023/5/31 21:20, Mark Brown wrote:
> On Wed, May 31, 2023 at 02:19:16PM +0800, William Qiu wrote:
>> On 2023/5/30 18:33, Mark Brown wrote:
> 
>> > You could always specify a different array of clocks depending on which
>> > compatible the driver sees, just like you'd conditionally request clocks
>> > individually.
> 
>> 	If specify a different array of clocks depending on which compatible
>> the driver sees, since there will also be clock operations in the suspend
>> and resume interfaces, this can make the code look complicated.
> 
> If you store the clock count and array in the driver data that should be
> fairly simple I think.
> 
>> 	as following:
> 
>> 	/* Obtain QSPI clock. */
>> 	cqspi->num_clks = devm_clk_bulk_get_all(dev, &cqspi->clks);
>> 	if (cqspi->num_clks < 0) {
>> 		dev_err(dev, "Cannot claim QSPI clock: %u\n", cqspi->num_clks);
>> 		return -EINVAL;
>> 	}
> 
>> 	This way, the code will look simpler and clearer. How do you think
>> about it.
> 
> I'm not clear how enable and disable would then work?

enable use this API:
clk_bulk_prepare_enable(dev->num_clks, dev->clks);

then disable:
clk_bulk_disable_unprepare(dev->num_clks, dev->clks);

But I'll first try specify a different array of clocks depending on which
compatible the driver sees first.

Best regards,
William