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From:   Konrad Dybcio <konrad.dybcio@linaro.org>
Subject: [PATCH 0/2] Update parts of PLL_TEST_CTL(_U) if required
Date:   Thu, 01 Jun 2023 11:39:06 +0200
Message-Id: <20230601-topic-alpha_ctl-v1-0-b6a932dfcf68@linaro.org>
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To:     Bjorn Andersson <andersson@kernel.org>,
        Andy Gross <agross@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Iskren Chernev <me@iskren.info>
Cc:     Marijn Suijten <marijn.suijten@somainline.org>,
        linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org,
        Konrad Dybcio <konrad.dybcio@linaro.org>
Precedence: bulk

Some recent-ish clock drivers touching on the "standard" Alpha PLLs
have been specifying the values that should be written into the CTL
registers as mask-value combos, but that wasn't always reflected
properly (or at all). This series tries to fix that without affecitng
the drivers that actually provide the full register values.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Konrad Dybcio (2):
      clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
      clk: qcom: gcc-sm6115: Add missing PLL config properties

 drivers/clk/qcom/clk-alpha-pll.c | 19 +++++++++++++++----
 drivers/clk/qcom/clk-alpha-pll.h |  2 ++
 drivers/clk/qcom/gcc-sm6115.c    |  8 ++++++++
 3 files changed, 25 insertions(+), 4 deletions(-)
---
base-commit: 571d71e886a5edc89b4ea6d0fe6f445282938320
change-id: 20230601-topic-alpha_ctl-ab0dc0ad3654

Best regards,
-- 
Konrad Dybcio <konrad.dybcio@linaro.org>