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[2620:137:e000::1:20]) by mx.google.com with ESMTP id o25-20020a637319000000b0051b29733bc9si2596432pgc.715.2023.06.01.04.54.52; Thu, 01 Jun 2023 04:55:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@infradead.org header.s=casper.20170209 header.b=IcuQb6Gb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232163AbjFALTX (ORCPT + 99 others); Thu, 1 Jun 2023 07:19:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230222AbjFALTW (ORCPT ); Thu, 1 Jun 2023 07:19:22 -0400 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62245123; Thu, 1 Jun 2023 04:19:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=k298/5fkUyGMQVZFoJngwDNksJ6FGeEJX961JrMA2G4=; b=IcuQb6Gb3H5ph6k4MgLyJ43Yw6 QFDMkrxLMRYR1xzUtFBXVk8ELrhj/aKtqB3FaPLPi2O4wvPHH74PLk2akm5wKnIx4RRQcxr2uFf28 AU8mQKRK1sH0GBhCQICt1PMSNksLKQfNRLfgQzapNPjeCekQCK6rJjdLNeRvxmxCky+mNyo+trpe7 ualPgeY6ag1fQOzZlqm3UgtCP06BNMYXfmeIntNYGhW7z5edNb/CPYINjXUSiSq67/7tZ5TrEuVQB RlsdrWO9ZKtvpscuaPsWessl0SMiwewxHifD8kl2Q9ldZ84zXbhxdcqG+/93LuYtrgi5yNMXiaGmS i0J9Ikyw==; Received: from j130084.upc-j.chello.nl ([24.132.130.84] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1q4gKY-008Jfd-D6; Thu, 01 Jun 2023 11:18:58 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id 0091B30031F; Thu, 1 Jun 2023 13:18:56 +0200 (CEST) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id DC97B202BDCB5; Thu, 1 Jun 2023 13:18:56 +0200 (CEST) Date: Thu, 1 Jun 2023 13:18:56 +0200 From: Peter Zijlstra To: Thomas Richter Cc: Ian Rogers , Marc Zyngier , Oliver Upton , Ravi Bangoria , Nathan Chancellor , namhyung@kernel.org, eranian@google.com, acme@kernel.org, mark.rutland@arm.com, jolsa@kernel.org, bp@alien8.de, kan.liang@linux.intel.com, adrian.hunter@intel.com, maddy@linux.ibm.com, x86@kernel.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, sandipan.das@amd.com, ananth.narayan@amd.com, santosh.shukla@amd.com, kvmarm@lists.linux.dev Subject: Re: [PATCH v4 3/4] perf/core: Remove pmu linear searching code Message-ID: <20230601111856.GW4253@hirez.programming.kicks-ass.net> References: <86jzwtdhmk.wl-maz@kernel.org> <86h6rxd3gh.wl-maz@kernel.org> <0075d8a9-2df4-86eb-8171-8995f59904e0@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jun 01, 2023 at 01:02:30PM +0200, Thomas Richter wrote: > PS: I have the feeling, it gets complicated to have multiple hardware PMUs > per platform. Recently someone was poking around giving the pmu device a parent, this would, I think, result in sysfs links, which could be used to decide what's what. Core pmus would have the CPU device as their parent, while memory controller thingies would link to the relevant node or something. Ofc. all that's future-work/pending.