Received: by 2002:a05:6358:3188:b0:123:57c1:9b43 with SMTP id q8csp1835704rwd; Fri, 2 Jun 2023 00:22:17 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ63blf98DVIhhscaPo48Z+7HlEm4ydj4ScJ52DS8oCyvcLqAU9NfeFFE+6ATLLeAeFD7qHs X-Received: by 2002:a05:6358:4e11:b0:127:db0e:395a with SMTP id cf17-20020a0563584e1100b00127db0e395amr3678147rwb.7.1685690536979; Fri, 02 Jun 2023 00:22:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685690536; cv=none; d=google.com; s=arc-20160816; b=lmw6A+skIYn8JFfDsf/0LO6aPoYTQkq7+yNRNOqnN/iAJ2ubl52qJisk/tZDXZjbg3 DVYmaWQZnLuC4cJXibhPEQMq6dHhoNff/4IC20+xeYLg9EkuSubRS7WYjZbZBJEQuYAH 13yr9UdsxTmkensyjh8K37mF7VRj4WT3oWNMqLmltMQODDKw1rHdNj4E7C1KfRvxzaPf rEPBvRNgggfMymKzPQgNvUU6xvHbMxy05EUvPxSPnfRwHQ1K0cBdHpfbLYFnIbkSaefS fhJg4tWeBlSyJNDB790OOCvKzvex89s0QXDpXiz2sydo5y/FJk9O28zlUYofGIA9biIO gwUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=gRdAp7F5weG2lEzSHBoGBF9HYiTPytKrt2ZWbc3vVf4=; b=Pw8Nj4SKzZXpLVu0og2h2D+LhcJ337l1V6ic32tdHo8CR1yW+0LEW6XwQVkSDwjdhZ ALv4RKcqmLr+k5LDeLzkjUJs+BlWeBI1r6RB5L5EQpnmHOoB932McC+h9pga4Pu3OrPa 0kpzCfTC7UAxm6xCxheh3N12bZv3tJZPk68qb9zgoBxz6hSy6A/WF4weimWf8WAIMKmP gnATZJl7xr86U88h+iHW1f1VFNQa+j3KYIRaQ3PL22aBp3PjQKS7c7GN/rB0Xr1RXFYh XxEPwvvLnHWa8BXji8jrc9v4vOoG9Yv3FVsgPo/i3tx804oG482NsuJB5i433fMxKQlo DLEQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 190-20020a6300c7000000b0053fc757bb04si560252pga.545.2023.06.02.00.22.05; Fri, 02 Jun 2023 00:22:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233900AbjFBHJ1 (ORCPT + 99 others); Fri, 2 Jun 2023 03:09:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233879AbjFBHJZ (ORCPT ); Fri, 2 Jun 2023 03:09:25 -0400 Received: from muru.com (muru.com [72.249.23.125]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id AF935C0; Fri, 2 Jun 2023 00:09:24 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id 0C5788111; Fri, 2 Jun 2023 07:09:24 +0000 (UTC) Date: Fri, 2 Jun 2023 10:09:22 +0300 From: Tony Lindgren To: Nishanth Menon Cc: Conor Dooley , Krzysztof Kozlowski , Rob Herring , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tero Kristo , Vignesh Raghavendra , Udit Kumar , Nitin Yadav , Neha Malcom Francis Subject: Re: [PATCH 3/6] arm64: dts: ti: k3-j721s2: Add general purpose timers Message-ID: <20230602070922.GJ14287@atomide.com> References: <20230531213215.602395-1-nm@ti.com> <20230531213215.602395-4-nm@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230531213215.602395-4-nm@ti.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Nishanth Menon [230531 21:32]: > There are 20 general purpose timers on j721s2 that can be used for > things like PWM using pwm-omap-dmtimer driver. There are also > additional ten timers in the MCU domain which are meant for MCU > firmware usage and hence marked reserved by default. > > Though the count is similar to J721e/J7200, the device IDs and clocks > used in j721s2 are different with the option of certain clocks having > options of additional clock muxes. Since there is very minimal reuse, > it is cleaner to integrate as part of SoC files itself. The defaults > are configured for clocking the timers from system clock(HFOSC0). Reviewed-by: Tony Lindgren