Received: by 2002:a05:6358:3188:b0:123:57c1:9b43 with SMTP id q8csp1835945rwd; Fri, 2 Jun 2023 00:22:39 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ77n85T4pj3iBzR0jw3xRtd6/zkEGCyIbbas2PrkkdONCOlJWYKepNujmtpkGgxLnsiXdDP X-Received: by 2002:a05:6808:219:b0:398:307:408d with SMTP id l25-20020a056808021900b003980307408dmr1821005oie.18.1685690559046; Fri, 02 Jun 2023 00:22:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685690559; cv=none; d=google.com; s=arc-20160816; b=iPVL/iLzL+S3gzULCfEuh7w25Oj0c7X/vYF92OhIcqazCCkmE5gvnqDPwdCTJszSLg KNXuvm2P6i6blftY05QhGB+ltQgOO1QrKIA0XeQS5E9JZpvJqgWzUgPoatyT/hlr/ado EDTfAH9wjVKDAzOlekBebAFrNg+O2dS4ex1DKkeCSdbV/liRH0Of5vKlrIIlOX+ojsiK ubZ4GKaGbBczhKJ+s4WEJ2PWvHeEAD0rAVHL0ETnY+u0NTYc91MP9YZS65Pm+m5WFaYv q14yvRqylc7jWAZPykaeDiTis+VjlEd8TI9eJsxpfmGf8be1JR82OLlkEFUqt6Qn76GI 1zTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=Juke5Ouz3t4QDvL6JuIQfGR29mLAB9HAiNltzYMw+6o=; b=fUU/AcJPxfN5jvmD7mO8FLguMuby1njfq8GKwStAtcEsiIvR5WrZ+U3kcavfpug3TQ fcDwTv40xcrN35dIudO/omt/ejOTi4ZKsVoD0XK9VXCVXzo9NBL4E+DkyrqJVPfb6aH9 UxoKLbUkY0ashlZiN3K7KclS1DmxsC7SZTWu1JwJYFIuHLviDCtFjOh8n10ebifpJdt3 Vwcrdp+opTZuaaGrK0t8GivpwaTEnr3wY8/KVbJmOfT4wBa8acgy8p0VZhtzWGSoxPih tYVI/dMORBXs4sUEMPHMv9GEWOS3QcDeSrbvYrf34KHgz7igSmY4MP4S/1n7FVdvHXIk SwVQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id mr12-20020a17090b238c00b002533b600bbesi2350535pjb.101.2023.06.02.00.22.27; Fri, 02 Jun 2023 00:22:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234114AbjFBHKu (ORCPT + 99 others); Fri, 2 Jun 2023 03:10:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234180AbjFBHKi (ORCPT ); Fri, 2 Jun 2023 03:10:38 -0400 Received: from muru.com (muru.com [72.249.23.125]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 62939197; Fri, 2 Jun 2023 00:10:35 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id CD4748111; Fri, 2 Jun 2023 07:10:34 +0000 (UTC) Date: Fri, 2 Jun 2023 10:10:33 +0300 From: Tony Lindgren To: Nishanth Menon Cc: Conor Dooley , Krzysztof Kozlowski , Rob Herring , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tero Kristo , Vignesh Raghavendra , Udit Kumar , Nitin Yadav , Neha Malcom Francis Subject: Re: [PATCH 5/6] arm64: dts: ti: k3-j784s4: Add general purpose timers Message-ID: <20230602071033.GL14287@atomide.com> References: <20230531213215.602395-1-nm@ti.com> <20230531213215.602395-6-nm@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230531213215.602395-6-nm@ti.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Nishanth Menon [230531 21:32]: > There are 20 general purpose timers on j784s4 that can be used for > things like PWM using pwm-omap-dmtimer driver. There are also > additional ten timers in the MCU domain which are meant for MCU > firmware usage and hence marked reserved by default. > > Though the count is similar to J721e/J7200/j721s2, the device IDs > and clocks used in j784s4 are different with the option of certain > clocks having options of additional clock muxes. Since there is very > minimal reuse, it is cleaner to integrate as part of SoC files itself. > The defaults are configured for clocking the timers from system > clock(HFOSC0). Reviewed-by: Tony Lindgren