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Date:   Fri, 2 Jun 2023 20:42:38 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Detlev Casanova <detlev.casanova@collabora.com>
Cc:     linux-kernel@vger.kernel.org,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        "David S . Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Florian Fainelli <f.fainelli@gmail.com>,
        netdev@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 2/3] dt-bindings: net: phy: Document support for
 external PHY clk
Message-ID: <4255bc0a-491c-4fbb-88ea-ec1d864a1a24@lunn.ch>
References: <20230602182659.307876-1-detlev.casanova@collabora.com>
 <20230602182659.307876-3-detlev.casanova@collabora.com>
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On Fri, Jun 02, 2023 at 02:26:58PM -0400, Detlev Casanova wrote:
> Ethern PHYs can have external an clock that needs to be activated before
> probing the PHY.

`Ethernet PHYs can have an external clock.`

We need to be careful with 'activated before probing the PHY'. phylib
itself will not activate the clock. You must be putting the IDs into
the compatible string, so the correct driver is loaded, and its probe
function is called. The probe itself enables the clock, so it is not
before probe, but during probe.

I'm picky about this because we have issues with enumerating the MDIO
bus to find PHYs. Some boards needs the PHY taking out of reset,
regulators enabled, clocks enabled etc, before the PHY will respond on
the bus. It is hard for the core to do this, before the probe. So we
recommend putting IDs in the compatible, so the driver probe function
to do any additional setup needed.

> Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
> ---
>  Documentation/devicetree/bindings/net/ethernet-phy.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> index 4f574532ee13..c1241c8a3b77 100644
> --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> @@ -93,6 +93,12 @@ properties:
>        the turn around line low at end of the control phase of the
>        MDIO transaction.
>  
> +  clocks:
> +    maxItems: 1
> +    description:
> +      External clock connected to the PHY. If not specified it is assumed
> +      that the PHY uses a fixed crystal or an internal oscillator.

This text is good.

    Andrew

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