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Date:   Fri, 2 Jun 2023 15:46:16 -0500
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Subject: Re: [PATCH v2 00/26] ASoC/soundwire: add support for ACE2.x
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To:     Vinod Koul <vkoul@kernel.org>,
        Bard Liao <yung-chuan.liao@linux.intel.com>,
        Mark Brown <broonie@kernel.org>
Cc:     alsa-devel@alsa-project.org, broonie@kernel.org, tiwai@suse.de,
        linux-kernel@vger.kernel.org, bard.liao@intel.com
References: <20230515071042.2038-1-yung-chuan.liao@linux.intel.com>
 <ZHHdSjXwyHvBezkG@matsya>
From:   Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
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On 5/27/23 05:36, Vinod Koul wrote:
> On 15-05-23, 15:10, Bard Liao wrote:
>> This series uses the abstraction added in past kernel cycles to provide
>> support for the ACE2.x integration. The existing SHIM and Cadence
>> registers are now split in 3 (SHIM, IP, SHIM vendor-specific), with some
>> parts also moved to the HDaudio Extended Multi link structures. Nothing
>> fundamentally different except for the register map.
>>
>> This series only provides the basic mechanisms to expose SoundWire-based
>> DAIs. The PCI parts and DSP management will be contributed later, and the
>> DAI ops are now empty as well.
>>
>> The change is mainly on SoundWire. It would be better to go through
>> SoundWire tree.
> 
> Applied, thanks

Hi Vinod, is there a way you could provide an immutable tag for Mark
Brown, the patch1 in this set is required for my next set of ASoC
LunarLake patches?

"ASoC: SOF: Intel: shim: add enum for ACE 2.0 IP used in LunarLake" adds
the SOF_INTEL_ACE_2_0 definition to select different ops for LunarLake.

Thank you
-Pierre