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From:   Michal Smulski <michal.smulski@ooma.com>
To:     Russell King <linux@armlinux.org.uk>
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Subject: RE: [PATCH net-next v6 1/1] net: dsa: mv88e6xxx: implement USXGMII
 mode for mv88e6393x
Thread-Topic: [PATCH net-next v6 1/1] net: dsa: mv88e6xxx: implement USXGMII
 mode for mv88e6393x
Thread-Index: AQHZlOeZhHXye15LEk+eN0zupHuzTK93WzEAgAEqjCA=
Date:   Sat, 3 Jun 2023 04:59:26 +0000
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I do not know if there is a an_complete bit as per my previous email. I thi=
nk for now I will set state->an_complete =3D state->link.
Michal

-----Original Message-----
From: Russell King <linux@armlinux.org.uk>=20
Sent: Friday, June 2, 2023 4:08 AM
To: msmulski2@gmail.com
Cc: andrew@lunn.ch; f.fainelli@gmail.com; olteanv@gmail.com; davem@davemlof=
t.net; edumazet@google.com; kuba@kernel.org; pabeni@redhat.com; netdev@vger=
.kernel.org; linux-kernel@vger.kernel.org; simon.horman@corigine.com; kabel=
@kernel.org; Michal Smulski <michal.smulski@ooma.com>
Subject: Re: [PATCH net-next v6 1/1] net: dsa: mv88e6xxx: implement USXGMII=
 mode for mv88e6393x

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On Thu, Jun 01, 2023 at 05:17:04PM -0700, msmulski2@gmail.com wrote:
> +static int mv88e639x_serdes_pcs_get_state_usxgmii(struct mv88e6xxx_chip =
*chip,
> +                                               int port, int lane,
> +                                               struct=20
> +phylink_link_state *state) {
> +     u16 status, lp_status;
> +     int err;
> +
> +     err =3D mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
> +                                 MV88E6390_USXGMII_PHY_STATUS, &status);
> +     if (err) {
> +             dev_err(chip->dev, "can't read Serdes USXGMII PHY status: %=
d\n", err);
> +             return err;
> +     }
> +     dev_dbg(chip->dev, "USXGMII PHY status: 0x%x\n", status);
> +
> +     state->link =3D !!(status & MDIO_USXGMII_LINK);

Another thing which is missing is filling in state->an_complete. Does the P=
HY have a status bit for this when operating in USXGMII mode?
If not, please set it to state->link.

Thanks.

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