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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Heiner Kallweit , Russell King , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next 1/2] net: phy: micrel: Move KSZ9477 errata fixes to PHY driver Message-ID: <9620f9f4-1d0f-45ed-b457-9a272af451f6@lunn.ch> References: <20230602234019.436513-1-robert.hancock@calian.com> <20230602234019.436513-2-robert.hancock@calian.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230602234019.436513-2-robert.hancock@calian.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 02, 2023 at 05:40:18PM -0600, Robert Hancock wrote: > The ksz9477 DSA switch driver is currently updating some MMD registers > on the internal port PHYs to address some chip errata. However, these > errata are really a property of the PHY itself, not the switch they are > part of, so this is kind of a layering violation. It makes more sense for > these writes to be done inside the driver which binds to the PHY and not > the driver for the containing device. > > This also addresses some issues where the ordering of when these writes > are done may have been incorrect, causing the link to erratically fail to > come up at the proper speed or at all. Doing this in the PHY driver > during config_init ensures that they happen before anything else tries to > change the state of the PHY on the port. > > The new code also ensures that autonegotiation is disabled during the > register writes and re-enabled afterwards, as indicated by the latest > version of the errata documentation from Microchip. > > Signed-off-by: Robert Hancock Reviewed-by: Andrew Lunn Andrew