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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id d9-20020ac244c9000000b004f24db9248dsm210750lfm.141.2023.06.03.19.39.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 03 Jun 2023 19:39:12 -0700 (PDT) Message-ID: Date: Sun, 4 Jun 2023 05:39:12 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v3 6/7] drm/msm/dsi: Add phy configuration for MSM8226 Content-Language: en-GB To: Luca Weiss , ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Rob Clark , Abhinav Kumar , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krishna Manikandan , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230308-msm8226-mdp-v3-0-b6284145d67a@z3ntu.xyz> <20230308-msm8226-mdp-v3-6-b6284145d67a@z3ntu.xyz> From: Dmitry Baryshkov In-Reply-To: <20230308-msm8226-mdp-v3-6-b6284145d67a@z3ntu.xyz> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/06/2023 20:00, Luca Weiss wrote: > MSM8226 uses a modified PLL lock sequence compared to MSM8974, which is > based on the function dsi_pll_enable_seq_m in the msm-3.10 kernel. > > Worth noting that the msm-3.10 downstream kernel also will try other > sequences in case this one doesn't work, but during testing it has shown > that the _m sequence succeeds first time also: > > .pll_enable_seqs[0] = dsi_pll_enable_seq_m, > .pll_enable_seqs[1] = dsi_pll_enable_seq_m, > .pll_enable_seqs[2] = dsi_pll_enable_seq_d, > .pll_enable_seqs[3] = dsi_pll_enable_seq_d, > .pll_enable_seqs[4] = dsi_pll_enable_seq_f1, > .pll_enable_seqs[5] = dsi_pll_enable_seq_c, > .pll_enable_seqs[6] = dsi_pll_enable_seq_e, > > We may need to expand this in the future. > > Signed-off-by: Luca Weiss > --- > drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 + > drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 3 +- > drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 97 ++++++++++++++++++++++++++++++ > 3 files changed, 101 insertions(+), 1 deletion(-) Reviewed-by: Dmitry Baryshkov -- With best wishes Dmitry