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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Richard van Schagen , Richard van Schagen , Frank Wunderlich , Bartel Eerdekens , erkin.bozoglu@xeront.com, mithat.guner@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org References: <20230522121532.86610-1-arinc.unal@arinc9.com> <20230522121532.86610-1-arinc.unal@arinc9.com> <20230522121532.86610-9-arinc.unal@arinc9.com> <20230522121532.86610-9-arinc.unal@arinc9.com> <20230524175107.hwzygo7p4l4rvawj@skbuf> <576f92b0-1900-f6ff-e92d-4b82e3436ea1@arinc9.com> <20230526130145.7wg75yoe6ut4na7g@skbuf> <7117531f-a9f2-63eb-f69d-23267e5745d0@arinc9.com> From: =?UTF-8?B?QXLEsW7DpyDDnE5BTA==?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-ZohoMailClient: External X-Spam-Status: No, score=-3.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3.06.2023 15:26, Russell King (Oracle) wrote: > On Sat, Jun 03, 2023 at 03:15:52PM +0300, Arınç ÜNAL wrote: >> On 26.05.2023 16:01, Vladimir Oltean wrote: >>> Ok, but given the premise of this patch set, that phylink is always available, >>> does it make sense for mt7531_cpu_port_config() and mt7988_cpu_port_config() >>> to manually call phylink methods? >> >> All I know is that that's how the implementation of phylink's PCS support in >> this driver works. It expects the MAC to be set up before calling >> mt753x_phylink_pcs_link_up() and mt753x_phylink_mac_link_up(). > > First, do you see a message printed for the DSA device indicating that > a link is up, without identifying the interface? For example, with > mv88e6xxx: > > mv88e6085 f1072004.mdio-mii:04: Link is Up - 1Gbps/Full - flow control off > > as opposed to a user port which will look like this: > > mv88e6085 f1072004.mdio-mii:04 lan1: Link is Up - 1Gbps/Full - flow control rx/tx > > If you do, that's likely for the CPU port, and indicates that phylink > is being used for the CPU port. If not, then you need to investigate > whether you've provided the full description in DT for the CPU port. > In other words, phy-mode and a fixed-link specification or in-band > mode. Yes I do see this. The DT is properly defined and the port is properly set up as a CPU port. > > Given that, you should have no need to make explicit calls to your > mac_config, pcs_link_up and mac_link_up functions. If you need to > make these calls, it suggests that phylink is not being used for the > CPU port. Your own commit does this so I don't know what to tell you. https://github.com/torvalds/linux/commit/cbd1f243bc41056c76fcfc5f3380cfac1f00d37b Arınç