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bh=TsbKSW9JVbhL1wyuCDwpF4ByVkNni40r/SR21ozZR2o=; b=V/sYkXBFt7TEaOBdrML7KL66K/hUYxiLRgJI3kKVvCFQdXs4ahAk7A3oZDOegpxo+H FNG2Kwo4MYRSmefIIaruxfX+NM5XvF7lo+DzqzQp1RMdNv6tGThgfWRGzSBQ1BC8obl0 4AJlw7W6F6FW358ZBLRD2LQK2vjGgIO10eRKcU3kavLVz+LAwnF/zSmbzxb+oz5Dp9F9 0I0dUeK7mmqOZWfoySzwf9wGLstiCvj4AEqb+0uminTKJ0WhwKv8BSxf3gU8I40W3Ptx R9nTdr3pAJCp+pBPbCnZLMxX1CEl5y6JkCxvm145DdVLWkrx7zy7Ibhd5yX7pP5yCMfQ KFug== X-Gm-Message-State: AC+VfDxPmV4ki9VrZz3pBEO3PEL0o6j3qdZwWvyDQeo+keNYTzuVXw2E UFwy3daIvXWML+5mD1O8CrRx39PNVanDHqfOknD7wQ== X-Received: by 2002:a81:6645:0:b0:564:e951:a7cc with SMTP id a66-20020a816645000000b00564e951a7ccmr76517ywc.45.1686009629423; Mon, 05 Jun 2023 17:00:29 -0700 (PDT) MIME-Version: 1.0 References: <20230601193112.4083934-1-tharvey@gateworks.com> <20230605002154.GT4199@dragon> In-Reply-To: <20230605002154.GT4199@dragon> From: Tim Harvey Date: Mon, 5 Jun 2023 17:00:18 -0700 Message-ID: Subject: Re: [PATCH] arm64: dts: imx8mp-venice-gw74xx: update to revB PCB To: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org, Rob Herring , Krzysztof Kozlowski , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Li Yang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Jun 4, 2023 at 5:22=E2=80=AFPM Shawn Guo wrot= e: > > On Thu, Jun 01, 2023 at 12:31:12PM -0700, Tim Harvey wrote: > > Update the imx8mp-venice-gw74xx for revB: > > - add CAN1 > > - add TIS-TPM on SPI2 > > - add FAN controller > > - fix PMIC I2C bus (revA PMIC I2C was non-functional so no need for > > backward compatible option) > > - M2 socket GPIO's moved > > > > Signed-off-by: Tim Harvey > > --- > > .../dts/freescale/imx8mp-venice-gw74xx.dts | 261 +++++++++++------- > > 1 file changed, 159 insertions(+), 102 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/a= rch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts > > index eb51d648359b..0e389ec5c2d4 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts > > @@ -125,12 +125,22 @@ reg_usb2_vbus: regulator-usb2 { > > regulator-max-microvolt =3D <5000000>; > > }; > > > > + reg_can1_stby: regulator-can1-stby { > > + compatible =3D "regulator-fixed"; > > + pinctrl-names =3D "default"; > > + pinctrl-0 =3D <&pinctrl_reg_can1>; > > + regulator-name =3D "can1_stby"; > > + gpio =3D <&gpio3 19 GPIO_ACTIVE_LOW>; > > + regulator-min-microvolt =3D <3300000>; > > + regulator-max-microvolt =3D <3300000>; > > + }; > > + > > reg_can2_stby: regulator-can2-stby { > > compatible =3D "regulator-fixed"; > > pinctrl-names =3D "default"; > > - pinctrl-0 =3D <&pinctrl_reg_can>; > > + pinctrl-0 =3D <&pinctrl_reg_can2>; > > regulator-name =3D "can2_stby"; > > - gpio =3D <&gpio3 19 GPIO_ACTIVE_LOW>; > > + gpio =3D <&gpio5 5 GPIO_ACTIVE_LOW>; > > regulator-min-microvolt =3D <3300000>; > > regulator-max-microvolt =3D <3300000>; > > }; > > @@ -164,6 +174,21 @@ &A53_3 { > > cpu-supply =3D <®_arm>; > > }; > > > > +&ecspi1 { > > + pinctrl-names =3D "default"; > > + pinctrl-0 =3D <&pinctrl_spi1>; > > + cs-gpios =3D <&gpio5 9 GPIO_ACTIVE_LOW>; > > + status =3D "okay"; > > + > > + tpm@0 { > > + compatible =3D "tcg,tpm_tis-spi"; > > + #address-cells =3D <0x1>; > > + #size-cells =3D <0x1>; > > + reg =3D <0x0>; > > + spi-max-frequency =3D <36000000>; > > + }; > > +}; > > + > > /* off-board header */ > > &ecspi2 { > > pinctrl-names =3D "default"; > > @@ -204,6 +229,13 @@ fixed-link { > > }; > > }; > > > > +&flexcan1 { > > + pinctrl-names =3D "default"; > > + pinctrl-0 =3D <&pinctrl_flexcan1>; > > + xceiver-supply =3D <®_can1_stby>; > > + status =3D "okay"; > > +}; > > + > > &flexcan2 { > > pinctrl-names =3D "default"; > > pinctrl-0 =3D <&pinctrl_flexcan2>; > > @@ -214,38 +246,38 @@ &flexcan2 { > > &gpio1 { > > gpio-line-names =3D > > "", "", "", "", "", "", "", "", > > - "", "", "dio0", "", "dio1", "", "", "", > > + "", "dio0", "", "dio1", "", "", "", "", > > "", "", "", "", "", "", "", "", > > "", "", "", "", "", "", "", ""; > > }; > > > > &gpio2 { > > gpio-line-names =3D > > - "", "", "", "", "", "", "", "", > > - "", "", "", "", "", "", "pcie3_wdis#", "", > > + "", "", "", "", "", "", "m2_pin20", "", > > + "", "", "", "", "", "pcie1_wdis#", "pcie3_wdis#", "", > > "", "", "pcie2_wdis#", "", "", "", "", "", > > "", "", "", "", "", "", "", ""; > > }; > > > > &gpio3 { > > gpio-line-names =3D > > - "m2_gdis#", "", "", "", "", "", "", "m2_rst#", > > + "", "", "", "", "", "", "m2_rst", "", > > + "", "", "", "", "", "", "", "", > > "", "", "", "", "", "", "", "", > > - "m2_off#", "", "", "", "", "", "", "", > > "", "", "", "", "", "", "", ""; > > }; > > > > &gpio4 { > > gpio-line-names =3D > > + "", "", "m2_off#", "", "", "", "", "", > > "", "", "", "", "", "", "", "", > > - "", "", "", "", "", "", "", "", > > - "", "", "", "", "m2_wdis#", "", "", "", > > - "", "", "", "", "", "", "", "uart_rs485"; > > + "", "", "m2_wdis#", "", "", "", "", "", > > + "", "", "", "", "", "", "", "rs485_en"; > > }; > > > > &gpio5 { > > gpio-line-names =3D > > - "uart_half", "uart_term", "", "", "", "", "", "", > > + "rs485_hd", "rs485_term", "", "", "", "", "", "", > > "", "", "", "", "", "", "", "", > > "", "", "", "", "", "", "", "", > > "", "", "", "", "", "", "", ""; > > @@ -286,6 +318,12 @@ channel@8 { > > label =3D "vdd_bat"; > > }; > > > > + channel@16 { > > + gw,mode =3D <4>; > > + reg =3D <0x16>; > > + label =3D "fan_tach"; > > + }; > > + > > channel@82 { > > gw,mode =3D <2>; > > reg =3D <0x82>; > > @@ -358,6 +396,11 @@ channel@a2 { > > gw,voltage-divider-ohms =3D <10000 10000>= ; > > }; > > }; > > + > > + fan-controller@0 { > > The unit-address doesn't match 'reg' property below. > > Shawn > Shawn, Thanks - I'll fix this in v2 Best Regards, Tim