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[2620:137:e000::1:20]) by mx.google.com with ESMTP id jx14-20020a0562142b0e00b006238440674csi6489223qvb.351.2023.06.06.09.24.13; Tue, 06 Jun 2023 09:24:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Rjz0P43a; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238205AbjFFQHB (ORCPT + 99 others); Tue, 6 Jun 2023 12:07:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233222AbjFFQG5 (ORCPT ); Tue, 6 Jun 2023 12:06:57 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 41A5B10D5; Tue, 6 Jun 2023 09:06:56 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 356G6j1D016152; Tue, 6 Jun 2023 11:06:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1686067605; bh=wAuwG6gGG3VasJWse8NQqXNrXByfQmV0b8aWJh6rGTo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Rjz0P43a0bzdIzLfEberbViSIcT5oOXWqJfINMSuuBkipveP/BcLhO3NWPv23ftpV 6Kg9aySeTeM6bBMD0LSnK55aUZaEGgaUBw/4z4Ok8MR4YULXNXaht5R4JNOTTSOCzK vWpJTwfa/ff1NHzSryah/w2uIyEpJ+nUHNIK2V4k= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 356G6jN9114477 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 6 Jun 2023 11:06:45 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 6 Jun 2023 11:06:44 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 6 Jun 2023 11:06:44 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 356G6ikJ014064; Tue, 6 Jun 2023 11:06:44 -0500 From: Nishanth Menon To: Conor Dooley , Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Jan Kiszka , Andrew Davis , Nishanth Menon Subject: [PATCH V2 1/4] arm64: dts: ti: k3-am65-main: Fix mux controller node name Date: Tue, 6 Jun 2023 11:06:40 -0500 Message-ID: <20230606160643.3618390-2-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230606160643.3618390-1-nm@ti.com> References: <20230606160643.3618390-1-nm@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add unit address to form a proper node name. Signed-off-by: Nishanth Menon --- No change since V1 V1: https://lore.kernel.org/r/20230424144949.244135-3-nm@ti.com arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 1adba2f2c153..f64b4e782ec3 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -506,7 +506,7 @@ serdes1_clk: clock@4090 { reg = <0x00004090 0x4>; }; - serdes_mux: mux-controller { + serdes_mux: mux-controller@4080 { compatible = "mmio-mux"; #mux-control-cells = <1>; mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */ -- 2.40.0