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Received: from DM6PR12MB4123.namprd12.prod.outlook.com (2603:10b6:5:21f::23) by DM4PR12MB6040.namprd12.prod.outlook.com (2603:10b6:8:af::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.33; Wed, 7 Jun 2023 06:59:53 +0000 Received: from DM6PR12MB4123.namprd12.prod.outlook.com ([fe80::8760:2e89:1243:2b5d]) by DM6PR12MB4123.namprd12.prod.outlook.com ([fe80::8760:2e89:1243:2b5d%6]) with mapi id 15.20.6455.030; Wed, 7 Jun 2023 06:59:53 +0000 Message-ID: <7d4016a7-871e-91d3-8744-7dc10d809d35@amd.com> Date: Wed, 7 Jun 2023 12:34:34 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH V3 4/9] ASoC: amd: ps: add SoundWire dma driver dma ops Content-Language: en-US To: Pierre-Louis Bossart , broonie@kernel.org Cc: alsa-devel@alsa-project.org, Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com, Mastan.Katragadda@amd.com, Arungopal.kondaveeti@amd.com, mario.limonciello@amd.com, Liam Girdwood , Jaroslav Kysela , Takashi Iwai , Syed Saba Kareem , open list References: <20230606060724.2038680-1-Vijendar.Mukunda@amd.com> <20230606060724.2038680-5-Vijendar.Mukunda@amd.com> <7ed3e421-ad04-746a-e252-45bc83f76256@linux.intel.com> From: "Mukunda,Vijendar" In-Reply-To: <7ed3e421-ad04-746a-e252-45bc83f76256@linux.intel.com> Content-Type: text/plain; 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>> + u32 stream_id; >> + u32 sdw_dma_en_reg; >> + u32 sdw_dma_en_stat_reg; >> + u32 sdw_dma_stat; >> + >> + stream = substream->runtime->private_data; >> + stream_id = stream->stream_id; >> + switch (stream->instance) { >> + case ACP_SDW0: >> + sdw_dma_en_reg = sdw0_dma_enable_reg[stream_id]; >> + break; >> + case ACP_SDW1: >> + sdw_dma_en_reg = sdw1_dma_enable_reg[stream_id]; >> + break; >> + default: >> + return -EINVAL; >> + } >> + writel(0x01, acp_base + sdw_dma_en_reg); >> + sdw_dma_en_stat_reg = sdw_dma_en_reg + 4; >> + return readl_poll_timeout(acp_base + sdw_dma_en_stat_reg, sdw_dma_stat, >> + (sdw_dma_stat & BIT(0)), ACP_DELAY_US, ACP_COUNTER); >> +} >> + >> +static int acp63_sdw_dma_stop(struct snd_pcm_substream *substream, void __iomem *acp_base) >> +{ >> + struct acp_sdw_dma_stream *stream; >> + u32 stream_id; >> + u32 sdw_dma_en_reg; >> + u32 sdw_dma_en_stat_reg; >> + u32 sdw_dma_stat; >> + >> + stream = substream->runtime->private_data; >> + stream_id = stream->stream_id; >> + switch (stream->instance) { >> + case ACP_SDW0: >> + sdw_dma_en_reg = sdw0_dma_enable_reg[stream_id]; >> + break; >> + case ACP_SDW1: >> + sdw_dma_en_reg = sdw1_dma_enable_reg[stream_id]; >> + break; >> + default: >> + return -EINVAL; >> + } >> + >> + writel(0, acp_base + sdw_dma_en_reg); >> + sdw_dma_en_stat_reg = sdw_dma_en_reg + 4; >> + return readl_poll_timeout(acp_base + sdw_dma_en_stat_reg, sdw_dma_stat, !sdw_dma_stat, >> + ACP_DELAY_US, ACP_COUNTER); >> +} > these start/stop routines look mostly the same, except for the value to > be written in the register. Maybe they can be factored with a common > helper, e.g. acp63_sdw_dma_enable(true/false). Yes, it can be refactored. Will fix it. >> + >> +static int acp63_sdw_dma_trigger(struct snd_soc_component *comp, >> + struct snd_pcm_substream *substream, >> + int cmd) >> +{ >> + struct sdw_dma_dev_data *sdw_data; >> + int ret; >> + >> + sdw_data = dev_get_drvdata(comp->dev); >> + switch (cmd) { >> + case SNDRV_PCM_TRIGGER_START: >> + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: >> + case SNDRV_PCM_TRIGGER_RESUME: >> + ret = acp63_sdw_dma_start(substream, sdw_data->acp_base); >> + break; >> + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: >> + case SNDRV_PCM_TRIGGER_SUSPEND: >> + case SNDRV_PCM_TRIGGER_STOP: >> + ret = acp63_sdw_dma_stop(substream, sdw_data->acp_base); >> + break; >> + default: >> + ret = -EINVAL; >> + } >> + if (ret) >> + dev_err(comp->dev, "trigger %d failed: %d", cmd, ret); >> + return ret; >> +}