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CC:     Varadarajan Narayanan <quic_varada@quicinc.com>
Subject: [PATCH 2/9] dt-bindings: phy: qcom,m31: Document qcom,m31 USB phy
Date:   Wed, 7 Jun 2023 16:26:06 +0530
Message-ID: <14f60578e2935c0844537eab162af3afa52ffe39.1686126439.git.quic_varada@quicinc.com>
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Document the M31 USB2 phy present in IPQ5332

Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
---
 .../devicetree/bindings/phy/qcom,m31.yaml          | 69 ++++++++++++++++++++++
 1 file changed, 69 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,m31.yaml

diff --git a/Documentation/devicetree/bindings/phy/qcom,m31.yaml b/Documentation/devicetree/bindings/phy/qcom,m31.yaml
new file mode 100644
index 0000000..8ad4ba4
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,m31.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/qcom,m31.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm M31 USB PHY
+
+maintainers:
+  - Sricharan Ramabadhran <quic_srichara@quicinc.com>
+  - Varadarajan Narayanan <quic_varada@quicinc.org>
+
+description:
+  This file contains documentation for the USB M31 PHY found in Qualcomm
+  IPQ5018, IPQ5332 SoCs.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - qcom,m31-usb-hsphy
+              - qcom,ipq5332-m31-usb-hsphy
+
+  reg:
+    description:
+      Offset and length of the M31 PHY register set
+    maxItems: 2
+
+  reg-names:
+    items:
+      - const: m31usb_phy_base
+      - const: qscratch_base
+
+  phy_type:
+    oneOf:
+      - items:
+          - enum:
+              - utmi
+              - ulpi
+
+  resets:
+    maxItems: 1
+    description:
+      List of phandles and reset pairs, one for each entry in reset-names.
+
+  reset-names:
+    items:
+      - const:
+          usb2_phy_reset
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
+    hs_m31phy_0: hs_m31phy@5b00 {
+        compatible = "qcom,m31-usb-hsphy";
+        reg = <0x5b000 0x3000>,
+            <0x08af8800 0x400>;
+        reg-names = "m31usb_phy_base",
+                "qscratch_base";
+        phy_type = "utmi";
+        resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
+        reset-names = "usb2_phy_reset";
+
+        status = "ok";
+    };
-- 
2.7.4