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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h18-20020a170902f7d200b001aedad06360si8591155plw.255.2023.06.07.04.11.59; Wed, 07 Jun 2023 04:12:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239921AbjFGK4V (ORCPT + 99 others); Wed, 7 Jun 2023 06:56:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36394 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238725AbjFGK4K (ORCPT ); Wed, 7 Jun 2023 06:56:10 -0400 Received: from 189.cn (ptr.189.cn [183.61.185.102]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 2AD071720 for ; Wed, 7 Jun 2023 03:56:05 -0700 (PDT) HMM_SOURCE_IP: 10.64.8.31:55208.1520123491 HMM_ATTACHE_NUM: 0000 HMM_SOURCE_TYPE: SMTP Received: from clientip-114.242.206.180 (unknown [10.64.8.31]) by 189.cn (HERMES) with SMTP id 6144A1002B3; Wed, 7 Jun 2023 18:56:02 +0800 (CST) Received: from ([114.242.206.180]) by gateway-151646-dep-75648544bd-xp9j7 with ESMTP id 2b02ab02dee24e789783e8e04e4c8ddc for l.stach@pengutronix.de; Wed, 07 Jun 2023 18:56:04 CST X-Transaction-ID: 2b02ab02dee24e789783e8e04e4c8ddc X-Real-From: 15330273260@189.cn X-Receive-IP: 114.242.206.180 X-MEDUSA-Status: 0 Sender: 15330273260@189.cn From: Sui Jingfeng <15330273260@189.cn> To: Lucas Stach , Russell King , Christian Gmeiner , David Airlie , Daniel Vetter , Li Yi Cc: linux-kernel@vger.kernel.org, etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Sui Jingfeng , Philipp Zabel , Bjorn Helgaas Subject: [PATCH v8 2/8] drm/etnaviv: add a dedicated function to get various clocks Date: Wed, 7 Jun 2023 18:55:45 +0800 Message-Id: <20230607105551.568639-3-15330273260@189.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230607105551.568639-1-15330273260@189.cn> References: <20230607105551.568639-1-15330273260@189.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,FROM_LOCAL_DIGITS, FROM_LOCAL_HEX,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sui Jingfeng Because it is also platform-dependent, there are environments where don't have CLK subsystem support, for example, discreted PCI GPUs. So don't rage quit if there is no CLK subsystem support. For the GPU in LS7A1000 and LS2K1000, the working frequency of the GPU is tuned by configuring the PLL registers. Cc: Lucas Stach Cc: Christian Gmeiner Cc: Philipp Zabel Cc: Bjorn Helgaas Cc: Daniel Vetter Signed-off-by: Sui Jingfeng --- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 53 ++++++++++++++++----------- 1 file changed, 32 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c index b9c12d3145a2..d4f99cb0456f 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -1565,6 +1565,35 @@ static irqreturn_t irq_handler(int irq, void *data) return ret; } +static int etnaviv_gpu_clk_get(struct etnaviv_gpu *gpu) +{ + struct device *dev = gpu->dev; + + gpu->clk_reg = devm_clk_get_optional(dev, "reg"); + DBG("clk_reg: %p", gpu->clk_reg); + if (IS_ERR(gpu->clk_reg)) + return PTR_ERR(gpu->clk_reg); + + gpu->clk_bus = devm_clk_get_optional(dev, "bus"); + DBG("clk_bus: %p", gpu->clk_bus); + if (IS_ERR(gpu->clk_bus)) + return PTR_ERR(gpu->clk_bus); + + gpu->clk_core = devm_clk_get(dev, "core"); + DBG("clk_core: %p", gpu->clk_core); + if (IS_ERR(gpu->clk_core)) + return PTR_ERR(gpu->clk_core); + gpu->base_rate_core = clk_get_rate(gpu->clk_core); + + gpu->clk_shader = devm_clk_get_optional(dev, "shader"); + DBG("clk_shader: %p", gpu->clk_shader); + if (IS_ERR(gpu->clk_shader)) + return PTR_ERR(gpu->clk_shader); + gpu->base_rate_shader = clk_get_rate(gpu->clk_shader); + + return 0; +} + static int etnaviv_gpu_clk_enable(struct etnaviv_gpu *gpu) { int ret; @@ -1865,27 +1894,9 @@ static int etnaviv_gpu_platform_probe(struct platform_device *pdev) return err; /* Get Clocks: */ - gpu->clk_reg = devm_clk_get_optional(&pdev->dev, "reg"); - DBG("clk_reg: %p", gpu->clk_reg); - if (IS_ERR(gpu->clk_reg)) - return PTR_ERR(gpu->clk_reg); - - gpu->clk_bus = devm_clk_get_optional(&pdev->dev, "bus"); - DBG("clk_bus: %p", gpu->clk_bus); - if (IS_ERR(gpu->clk_bus)) - return PTR_ERR(gpu->clk_bus); - - gpu->clk_core = devm_clk_get(&pdev->dev, "core"); - DBG("clk_core: %p", gpu->clk_core); - if (IS_ERR(gpu->clk_core)) - return PTR_ERR(gpu->clk_core); - gpu->base_rate_core = clk_get_rate(gpu->clk_core); - - gpu->clk_shader = devm_clk_get_optional(&pdev->dev, "shader"); - DBG("clk_shader: %p", gpu->clk_shader); - if (IS_ERR(gpu->clk_shader)) - return PTR_ERR(gpu->clk_shader); - gpu->base_rate_shader = clk_get_rate(gpu->clk_shader); + err = etnaviv_gpu_clk_get(gpu); + if (err) + return err; /* TODO: figure out max mapped size */ dev_set_drvdata(dev, gpu); -- 2.25.1