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[2620:137:e000::1:20]) by mx.google.com with ESMTP id f9-20020a170902f38900b001adf24718c1si1450006ple.256.2023.06.07.13.16.00; Wed, 07 Jun 2023 13:16:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@broadcom.com header.s=google header.b=YYauZPFf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229589AbjFGUCG (ORCPT + 99 others); Wed, 7 Jun 2023 16:02:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230447AbjFGUCC (ORCPT ); Wed, 7 Jun 2023 16:02:02 -0400 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6204C2103 for ; Wed, 7 Jun 2023 13:02:00 -0700 (PDT) Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-651ffcc1d3dso4633946b3a.3 for ; Wed, 07 Jun 2023 13:02:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1686168120; x=1688760120; h=in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject:from:to:cc:subject:date:message-id:reply-to; bh=2pZnq2Llr9PC4Kft0tG5v1sAOWoXbc7EJYcDacolG9I=; b=YYauZPFfQK3n5CR9GVNbeSyVyEGZ7qVHNe3zayGI6+LteUW+Rr3VgHK6iXpTYyhjYZ J1/H6RH1zU3KH2cJFdx2dGynMx5dzdf1XS5rciXkkWtiTcXUbgRzulo1YpEk7kO5SEsa 8Nbq3LMVyh/90lLwnvooaPcE0bE+IuHEvN2U4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686168120; x=1688760120; h=in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=2pZnq2Llr9PC4Kft0tG5v1sAOWoXbc7EJYcDacolG9I=; b=IbZPtPYoCNgwNah8gveCAH29ak4xNIwqPx4Kq3Nhj2xDuRXFHsQ2gRQBUQbYzjTAuQ 05F1iBXqvo+nGqD8Ta4SJsAP56uX4afQ/F+g/YA9TTZGXvH162kz6VHAUVNkla4HUgfM eqtEyv22kEYqKJsxKQ/RnXptw6PZ/a012GE4iZctY4k0ZKiqy6bthHpdvMWTyqHNe74e SydbdMrJrYt/hAI047krEAIbKcK8J/FL2s3FtQJTfhdiOG9bnRxw0tmtA0OfgEg2PGP0 wWm1USRkr4maa3K67YrBH+WJOecLKtXB2uv8pIEhRjxsRXVVbN/ieIU5+ZcIORUedjgZ r2Gw== X-Gm-Message-State: AC+VfDzIyvyeBpLKE31NLj0WWJHw8SuMQxQZiR97rukqe/FYoxAaTH63 CSIRHgxZpXxbhxM4cE9uTElEmQ== X-Received: by 2002:a05:6a00:a8d:b0:647:370c:2c2a with SMTP id b13-20020a056a000a8d00b00647370c2c2amr4748391pfl.6.1686168119659; Wed, 07 Jun 2023 13:01:59 -0700 (PDT) Received: from bcacpedev-irv-3.lvn.broadcom.net ([192.19.161.250]) by smtp.gmail.com with ESMTPSA id q17-20020a62ae11000000b0064f95bb8255sm8821029pff.53.2023.06.07.13.01.56 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 07 Jun 2023 13:01:57 -0700 (PDT) Subject: Re: [PATCH 05/12] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs To: Miquel Raynal Cc: Broadcom Kernel List , Linux MTD List , f.fainelli@gmail.com, rafal@milecki.pl, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, computersforpeace@gmail.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Vignesh Raghavendra , Richard Weinberger , Kamal Dasu , Rob Herring References: <20230606231252.94838-1-william.zhang@broadcom.com> <20230606231252.94838-6-william.zhang@broadcom.com> <20230607101452.4c265d7e@xps-13> From: William Zhang Message-ID: <84e97108-29d4-5103-14f4-03e3c0eba165@broadcom.com> Date: Wed, 7 Jun 2023 13:01:56 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20230607101452.4c265d7e@xps-13> Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="000000000000d534b905fd8f9b1e" X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --000000000000d534b905fd8f9b1e Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Hi Miquel, On 06/07/2023 01:14 AM, Miquel Raynal wrote: > Hi William, > > william.zhang@broadcom.com wrote on Tue, 6 Jun 2023 16:12:45 -0700: > >> Use new compatiable brcm,nand-bcmbca to support BCMBCA broadband >> product. The old compatible string is still kept in the driver so old >> dtb can still work. >> >> Add brcm,nand-use-wp property to have an option for disabling this >> feature on broadband board design that does not use write protection. >> Add brcm,nand-ecc-use-strap to get ecc setting from board strap for >> broadband board designs because they do not specify ecc setting in dts >> but rather using the strap setting. >> >> Remove the requirement of interrupts and interrupt-names properties to >> reflect the driver code. >> >> This patch also includes a few minor fixes to the BCM63xx compatibles >> and add myself to the list of maintainers. >> >> Signed-off-by: William Zhang >> --- >> >> .../bindings/mtd/brcm,brcmnand.yaml | 64 +++++++++++++------ >> 1 file changed, 43 insertions(+), 21 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml >> index 1571024aa119..1fe1c166a9db 100644 >> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml >> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml >> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller >> maintainers: >> - Brian Norris >> - Kamal Dasu >> + - William Zhang >> >> description: | >> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND >> @@ -18,9 +19,10 @@ description: | >> supports basic PROGRAM and READ functions, among other features. >> >> This controller was originally designed for STB SoCs (BCM7xxx) but is now >> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and >> - iProc/Cygnus. Its history includes several similar (but not fully register >> - compatible) versions. >> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based >> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus. >> + Its history includes several similar (but not fully register compatible) >> + versions. >> >> -- Additional SoC-specific NAND controller properties -- >> >> @@ -53,9 +55,9 @@ properties: >> - brcm,brcmnand-v7.2 >> - brcm,brcmnand-v7.3 >> - const: brcm,brcmnand >> - - description: BCM63138 SoC-specific NAND controller >> + - description: BCMBCA SoC-specific NAND controller >> items: >> - - const: brcm,nand-bcm63138 >> + - const: brcm,nand-bcmbca >> - enum: >> - brcm,brcmnand-v7.0 >> - brcm,brcmnand-v7.1 >> @@ -65,11 +67,15 @@ properties: >> - const: brcm,nand-iproc >> - const: brcm,brcmnand-v6.1 >> - const: brcm,brcmnand >> - - description: BCM63168 SoC-specific NAND controller >> + - description: BCM63xx SoC-specific NAND controller >> items: >> - - const: brcm,nand-bcm63168 >> - - const: brcm,nand-bcm6368 >> - - const: brcm,brcmnand-v4.0 >> + - enum: >> + - brcm,nand-bcm63168 >> + - brcm,nand-bcm6368 >> + - enum: >> + - brcm,brcmnand-v2.1 >> + - brcm,brcmnand-v2.2 >> + - brcm,brcmnand-v4.0 >> - const: brcm,brcmnand >> >> reg: >> @@ -111,6 +117,19 @@ properties: >> earlier versions of this core that include WP >> type: boolean >> >> + brcm,nand-use-wp: >> + description: >> + Use this integer to indicate if board design uses >> + controller's write protection feature and connects its >> + NAND_WPb pin to nand chip's WP_L pin. Driver defaults to >> + use this feature when this property does not exist. >> + Set to 0 if WP pins are not connected and feature is not >> + used. Set to 1 if WP pins are connected and feature is used. >> + Set to 2 if WP pins are connected but disable this feature >> + through driver that sets controller to output high on NAND_WPb. >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + enum: [0, 1, 2] > > Perhaps strings would be welcome. I'll let binding maintainers say what > they think of it. > Practically there is really just use cases of 0 and 1. I could use a bool flag but to keep consistent with the driver code and in case there is any existing usage of 2. >> + >> patternProperties: >> "^nand@[a-f0-9]$": >> type: object >> @@ -136,13 +155,23 @@ patternProperties: >> layout. >> $ref: /schemas/types.yaml#/definitions/uint32 >> >> + brcm,nand-ecc-use-strap: >> + description: >> + This flag is used by the driver to get the ecc strength and >> + spare area size from the SoC NAND boot strap setting. This >> + is commonly used by the BCMBCA SoC board design. If ecc >> + strength and spare area size are set by nand-ecc-strength >> + and brcm,nand-oob-sector-size in the dts, these settings >> + have precedence and override this flag. >> + $ref: /schemas/types.yaml#/definitions/flag > > How in practice do you access the strap value? Don't you need a phandle > over a specific area in the SoC? > The strap value is latched and stored in the NAND controller register so there is no extra phandle needed. >> + >> allOf: >> - $ref: nand-controller.yaml# >> - if: >> properties: >> compatible: >> contains: >> - const: brcm,nand-bcm63138 >> + const: brcm,nand-bcmbca >> then: >> properties: >> reg-names: >> @@ -153,7 +182,9 @@ allOf: >> properties: >> compatible: >> contains: >> - const: brcm,nand-bcm6368 >> + enum: >> + - brcm,nand-bcm63168 >> + - brcm,nand-bcm6368 >> then: >> properties: >> reg-names: >> @@ -173,20 +204,12 @@ allOf: >> - const: nand >> - const: iproc-idm >> - const: iproc-ext >> - - if: >> - properties: >> - interrupts: >> - minItems: 2 >> - then: >> - required: >> - - interrupt-names > > Why do you remove this? Removing "interrupts" from the required > properties is fine, but constraining the interrupts property when it is > relevant is still expected. > There is no requirement for interrupt name even if it have two interrupts. Driver code does not use interrupt name but the interrupt index instead. >> >> unevaluatedProperties: false >> >> required: >> - reg >> - reg-names >> - - interrupts > > This should be done in a separate patch. > I thought this is also related to my update for bcmbca chips because they don't need to interrupt and interrupt name. >> >> examples: >> - | >> @@ -215,8 +238,7 @@ examples: >> }; >> - | >> nand-controller@10000200 { >> - compatible = "brcm,nand-bcm63168", "brcm,nand-bcm6368", >> - "brcm,brcmnand-v4.0", "brcm,brcmnand"; >> + compatible = "brcm,nand-bcm6368", "brcm,brcmnand-v2.1", "brcm,brcmnand"; >> reg = <0x10000200 0x180>, >> <0x100000b0 0x10>, >> <0x10000600 0x200>; > > > Thanks, > Miquèl > --000000000000d534b905fd8f9b1e Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="smime.p7s" Content-Description: S/MIME Cryptographic Signature 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