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Wed, 7 Jun 2023 17:20:12 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v5 17/26] cxl/port: Remove Component Register base address from struct cxl_dport Date: Wed, 7 Jun 2023 17:16:42 -0500 Message-ID: <20230607221651.2454764-18-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230607221651.2454764-1-terry.bowman@amd.com> References: <20230607221651.2454764-1-terry.bowman@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF0000150B:EE_|MW4PR12MB6998:EE_ X-MS-Office365-Filtering-Correlation-Id: 2ce3ae14-b780-4712-93a2-08db67a55e20 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: GoOsMhWZtT4wRDBBsCrVSMY29kK84GlxbGmgaC9GuPUA1b5ZjIU+sTnAWkvUWT5k3+9srtCnU/ujMUXrv0TFerkcvDBK0FaJFcj/Dt3lH+fg29gJpp2Mc60h5YBP+YHHUeDdWZ+ZFhPEzbg6zs2zCillTjYCThagM/l4o+ztLDfUnnIX7AvcJHvKXvOy02n8Pnl4RbJ1zUEtRZoxtlXo/M8Q1gM7/jaQm892uLyZsU7E/AGUIRKJ2jLHTgXRQK9sAoAXFTDPKQ5Cn4HfHXhX5zI1MYmrQ7n2NgmWo3R58S1BZtO0EX0GTEzKGgwDBYKBgfyhrY7FXE7SFC8Jcbym2/3yr0hYry0Blg810KUgPScTPHBEFM4m8XfvdMtyWUdRj5ZZOMwVXiYo6U3WgMeQ1qKZq9pGah4iTDsO5HanEbz99akn2s8TvjLWnfbuNXpbWCnrbx+Egq3mf46Mnduz6cY5Boa4xMi5VqAifExnI8/p2UrSPPFWM5Q5YzPXbJZFCh0OBCWMoh76zv5lA3wpCW48DDSXd6BJYNnqCYHGg6uQX37G9XHsiZ7jr/oBPaCyTJxyNaThAJ0zYWN3iFifV+EKjgBMsQx5fqf8VHP7q2XQl8c6zjiUZ1NhYVSitj7r+9KOd1snINyQ7mm29v6L5I01zd4k2cf+J+BuW+hDuHnn0zNvqeAOt0IpUS2oWq/Q+e4iUEMSrT5v4aVeiEJmlw3Y0raTj52tQZ81e4NFirIwTTcQPL1RNYRRoTZo2G0gQHj69NFsQTEknvFfigT28A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(396003)(39860400002)(376002)(346002)(136003)(451199021)(46966006)(36840700001)(40470700004)(83380400001)(40460700003)(336012)(47076005)(426003)(2906002)(2616005)(36756003)(86362001)(82310400005)(356005)(81166007)(82740400003)(36860700001)(40480700001)(41300700001)(316002)(6666004)(5660300002)(8936002)(8676002)(7696005)(110136005)(478600001)(54906003)(70586007)(4326008)(70206006)(26005)(1076003)(16526019)(7416002)(186003)(44832011)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2023 22:20:14.8890 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2ce3ae14-b780-4712-93a2-08db67a55e20 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF0000150B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6998 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Robert Richter The Component Register base address @component_reg_phys is no longer used after the rework of the Component Register setup which now uses struct member @comp_map instead. Remove the base address. Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Reviewed-by: Jonathan Cameron --- drivers/cxl/core/port.c | 1 - drivers/cxl/cxl.h | 2 -- 2 files changed, 3 deletions(-) diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index 554d779af619..3111f754c740 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -994,7 +994,6 @@ __devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev, dport->dev = dport_dev; dport->port_id = port_id; - dport->component_reg_phys = component_reg_phys; dport->port = port; rc = cxl_dport_setup_regs(dport, component_reg_phys); diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 4365d46606df..6134644b51f8 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -601,7 +601,6 @@ struct cxl_rcrb_info { * @port: reference to cxl_port that contains this downstream port * @comp_map: component register capability mappings * @port_id: unique hardware identifier for dport in decoder target list - * @component_reg_phys: downstream port component registers * @rch: Indicate whether this dport was enumerated in RCH or VH mode * @rcrb: Data about the Root Complex Register Block layout */ @@ -610,7 +609,6 @@ struct cxl_dport { struct cxl_port *port; struct cxl_register_map comp_map; int port_id; - resource_size_t component_reg_phys; bool rch; struct cxl_rcrb_info rcrb; }; -- 2.34.1