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Message-ID: <6d5bd11c-6f57-adc9-b35c-78cb80882d52@collabora.com>
Date:   Thu, 8 Jun 2023 16:18:58 +0200
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Subject: Re: [PATCH 2/4] arm64: dts: mediatek: mt8186: Wire up CPU
 frequency/voltage scaling
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To:     Chen-Yu Tsai <wenst@chromium.org>,
        Matthias Brugger <matthias.bgg@gmail.com>
Cc:     devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>
References: <20230607090653.2468317-1-wenst@chromium.org>
 <20230607090653.2468317-3-wenst@chromium.org>
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
In-Reply-To: <20230607090653.2468317-3-wenst@chromium.org>
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Precedence: bulk

Il 07/06/23 11:06, Chen-Yu Tsai ha scritto:
> This adds clocks, dynamic power coefficients, and OPP tables for the CPU
> cores, so that everything required at the SoC level for CPU freqency and
> voltage scaling is available.
> 
> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
> ---
>   arch/arm64/boot/dts/mediatek/mt8186.dtsi | 274 +++++++++++++++++++++++
>   1 file changed, 274 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> index 1b754f7a0725..6735c1feb26d 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> @@ -136,6 +136,240 @@ cci_opp_15: opp-1400000000 {
>   		};
>   	};
>   
> +	cluster0_opp: opp-table-cluster0 {
> +		compatible = "operating-points-v2";
> +		opp-shared;
> +
> +		opp-500000000 {
> +			opp-hz = /bits/ 64 <500000000>;
> +			opp-microvolt = <600000>;
> +			opp-level = <15>;

As far as I remember we don't need opp-level, can you please recheck that
and in case remove the levels from all OPPs?

Thanks,
Angelo