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Message-ID: <f8a10a00-c3e4-9749-789d-39fba7944646@gmail.com>
Date:   Thu, 8 Jun 2023 18:30:40 +0200
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From:   Johan Jonker <jbx6244@gmail.com>
Subject: [PATCH v1 3/5] mtd: nand: raw: rockchip-nand-controller: fix nand
 timing default
To:     miquel.raynal@bootlin.com
Cc:     richard@nod.at, vigneshr@ti.com, heiko@sntech.de,
        linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-rockchip@lists.infradead.org, yifeng.zhao@rock-chips.com
References: <19bf714a-43f9-c30a-8197-91aaaf4a6e5d@gmail.com>
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Somehow not all NAND chips give a valid timing setting with the
nand_get_sdr_timings() function. Don't consider it as an error,
but fall back to the default value in order to continue to use
the driver.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
 drivers/mtd/nand/raw/rockchip-nand-controller.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/raw/rockchip-nand-controller.c b/drivers/mtd/nand/raw/rockchip-nand-controller.c
index f56430f6c..e39431cfa 100644
--- a/drivers/mtd/nand/raw/rockchip-nand-controller.c
+++ b/drivers/mtd/nand/raw/rockchip-nand-controller.c
@@ -429,8 +429,10 @@ static int rk_nfc_setup_interface(struct nand_chip *chip, int target,
 		return 0;

 	timings = nand_get_sdr_timings(conf);
-	if (IS_ERR(timings))
-		return -EOPNOTSUPP;
+	if (IS_ERR(timings)) {
+		rknand->timing = 0x1081;
+		return 0;
+	}

 	if (IS_ERR(nfc->nfc_clk))
 		rate = clk_get_rate(nfc->ahb_clk);
--
2.30.2