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From:   Ian Rogers <irogers@google.com>
Date:   Thu, 8 Jun 2023 23:00:51 -0700
Message-ID: <CAP-5=fUOPWd51gihOtytS6-FvTt6jnMGFSA9nsfmGYMSN4E21Q@mail.gmail.com>
Subject: Re: [PATCH v5 28/34] perf pmus: Split pmus list into core and other
To:     Ravi Bangoria <ravi.bangoria@amd.com>
Cc:     Suzuki K Poulose <suzuki.poulose@arm.com>,
        Mike Leach <mike.leach@linaro.org>,
        Leo Yan <leo.yan@linaro.org>,
        John Garry <john.g.garry@oracle.com>,
        Will Deacon <will@kernel.org>,
        James Clark <james.clark@arm.com>,
        Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jiri Olsa <jolsa@kernel.org>,
        Namhyung Kim <namhyung@kernel.org>,
        Adrian Hunter <adrian.hunter@intel.com>,
        Kajol Jain <kjain@linux.ibm.com>,
        Jing Zhang <renyu.zj@linux.alibaba.com>,
        Kan Liang <kan.liang@linux.intel.com>,
        Zhengjun Xing <zhengjun.xing@linux.intel.com>,
        Madhavan Srinivasan <maddy@linux.ibm.com>,
        Athira Rajeev <atrajeev@linux.vnet.ibm.com>,
        Ming Wang <wangming01@loongson.cn>,
        Huacai Chen <chenhuacai@kernel.org>,
        Sandipan Das <sandipan.das@amd.com>,
        Dmitrii Dolgov <9erthalion6@gmail.com>,
        Sean Christopherson <seanjc@google.com>,
        Ali Saidi <alisaidi@amazon.com>, Rob Herring <robh@kernel.org>,
        Thomas Richter <tmricht@linux.ibm.com>,
        Kang Minchul <tegongkang@gmail.com>,
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On Thu, Jun 8, 2023 at 10:55=E2=80=AFPM Ravi Bangoria <ravi.bangoria@amd.co=
m> wrote:
>
> On 09-Jun-23 11:05 AM, Ian Rogers wrote:
> > On Thu, Jun 8, 2023 at 10:30=E2=80=AFPM Ravi Bangoria <ravi.bangoria@am=
d.com> wrote:
> >>
> >> On 09-Jun-23 10:10 AM, Ian Rogers wrote:
> >>> On Thu, Jun 8, 2023 at 9:01=E2=80=AFPM Ravi Bangoria <ravi.bangoria@a=
md.com> wrote:
> >>>>
> >>>> Hi Ian,
> >>>
> >>> Hi Ravi,
> >>>
> >>>> On 27-May-23 12:52 PM, Ian Rogers wrote:
> >>>>> Split the pmus list into core and other. This will later allow for
> >>>>> the core and other pmus to be populated separately.
> >>>>>
> >>>>> Signed-off-by: Ian Rogers <irogers@google.com>
> >>>>> Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
> >>>>> ---
> >>>>>  tools/perf/util/pmus.c | 52 ++++++++++++++++++++++++++++++--------=
----
> >>>>>  1 file changed, 38 insertions(+), 14 deletions(-)
> >>>>>
> >>>>> diff --git a/tools/perf/util/pmus.c b/tools/perf/util/pmus.c
> >>>>> index 58ff7937e9b7..4ef4fecd335f 100644
> >>>>> --- a/tools/perf/util/pmus.c
> >>>>> +++ b/tools/perf/util/pmus.c
> >>>>> @@ -12,13 +12,19 @@
> >>>>>  #include "pmu.h"
> >>>>>  #include "print-events.h"
> >>>>>
> >>>>> -static LIST_HEAD(pmus);
> >>>>> +static LIST_HEAD(core_pmus);
> >>>>> +static LIST_HEAD(other_pmus);
> >>>>
> >>>> AMD ibs_fetch// and ibs_op// PMUs are per SMT-thread and are indepen=
dent of
> >>>> core hw pmu. I wonder where does IBS fit. Currently it's part of oth=
er_pmus.
> >>>> So, is it safe to assume that other_pmus are not just uncore pmus? I=
n that
> >>>> case shall we add a comment here?
> >>>
> >>> I'm a fan of comments. The code has landed in perf-tools-next:
> >>> https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git/tree/t=
ools/perf/util/pmus.c?h=3Dperf-tools-next
> >>> Do you have any suggestions on wording? I've had limited success
> >>> adding glossary terms, for example, offcore vs uncore:
> >>> https://perf.wiki.kernel.org/index.php/Glossary#Offcore
> >>> I think offcore is a more interconnect related term, but I'd prefer
> >>> not to be inventing the definitions. I'd like it if we could be less
> >>> ambiguous in the code and provide useful information on the wiki, so
> >>> help appreciated :-)
> >>
> >> Does this look good?
> >>
> >> /*
> >>  * core_pmus:  A PMU belongs to core_pmus if it's name is "cpu" or it'=
s sysfs
> >>  *             directory contains "cpus" file. All PMUs belonging to c=
ore_pmus
> >>  *             must have pmu->is_core=3D1. If there are more than one =
PMUs in
> >>  *             this list, perf interprets it as a heterogeneous platfo=
rm.
> >
> >
> > Looks good but a nit here. It is heterogeneous from point-of-view of
> > PMUs, there are ARM systems where they are heterogenous with big an> li=
ttle cores but they have a single homogeneous PMU driver. The perf
> > tool will treat them as homogeneous.
>
> In that case number of entries in core_pmus list would still be 1 right?

Right. Heterogeneous platform, homogeneous PMU, single core PMU.

Thanks,
Ian

> Thanks,
> Ravi