Received: by 2002:a05:6358:3188:b0:123:57c1:9b43 with SMTP id q8csp2002480rwd; Fri, 9 Jun 2023 05:29:20 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ61hM84h5AyAOxmWBzxs/4ERpfZ8DiY/oHbKe0Y5uaV1cChCsVp+FOPv7oIwyK2np5dzzXh X-Received: by 2002:a05:6a20:3d81:b0:115:83f:fce1 with SMTP id s1-20020a056a203d8100b00115083ffce1mr1479254pzi.5.1686313760421; Fri, 09 Jun 2023 05:29:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686313760; cv=none; d=google.com; s=arc-20160816; b=tDtpJ6PYlrhSylOEJLwZ7BTGxcMLRWCNWZQ/DrhGfbZyUTED7luMiuX+zhFukaFHcU m0GkeZ4ha6C+VjvmJWZFpXBTteo+CjkwA5Lv4Fili+b0iYJ6MtJnKbrGqDfpbaSHHyUs FPI0Hnd7eEq13hfnWaaf2JLqhXzD0NBezz+L2sMHCS4Mvz2+XRkkKfQy5zGonr79sDMj MHJR2a0yvv7E+DEBQlFbrn0ohxVXhz9DN4qoewRJJusoW+OGiYhQDLnjwt0E+I9NRoty 7CV6MMgBBz9VW99/9ORYiflzTTv3pkwRVtrkQOBrD2T8YbuW5hVopDo8Jdy2P+8Y3ZPC PG4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=/RRHLfwkWunS9Uzoq3MMWi85jNrSNoh0iK2szipWAYk=; b=QpUAj5lfrND6yAmhBwV4mS1euO+niOOo2IaVXXz0I+YirISGJMpupkpIVxWmA6FI7d AO0OFFi6X4lW6ACTYXIHvE/XfhS1oZ4YUyEvZr+k3sh0GhsC6O6ctU9u6EIuVk6ueANn gj4t2yNZV7L6AUlINf8bpTAZtyCPgzBYpc5REXQbcgTGvYgx/6ebGZrBYP37UFfZQTHo quv+y1MiJA5jpZT537+VjCtniz9aFPFtNDbr487hG2GFldLvfHtWxzEZP/W5wlnzDtZl cxhrciKIG7tDknVbszpjc/ow9ixmPy4E1EHtJhsJsx8wFoCSbfPaOBhrLo3w1SGf1XV7 0KkQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="huMAND/C"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j24-20020a63cf18000000b0053fc3bc33e4si2452988pgg.795.2023.06.09.05.29.08; Fri, 09 Jun 2023 05:29:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="huMAND/C"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239209AbjFIMVK (ORCPT + 99 others); Fri, 9 Jun 2023 08:21:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239055AbjFIMVB (ORCPT ); Fri, 9 Jun 2023 08:21:01 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8D61E50; Fri, 9 Jun 2023 05:20:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686313259; x=1717849259; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=rdh8Kl69+xkYuoast0lKfh0GODJsyTNnmG1WAARcz24=; b=huMAND/Cifi00ywqBWKFQ403Asq2GVGsJDxdaZqaELoF5BuykSzTkMaz +Vhobp94YJV4pNoqrzJ8hv9NDUss8BMVoP0Ha6YG7y2aQiJ7+LfszicZC mtk46/ldcsJJNwnbPsk+lnRJNHjOPmF5SkljG8/rSZ3v14i+KNxeVarpH Fg7mTh+EWiS3IkM1cSjbf0U3KHXRw0jWjOB+/eIKRQEMUTUZJ8H0vK7Ot Ti16P1BmwZlfGBFZjTDwjvzR9umkQfxk8Ce2+XRGi+XfmeOc3q4ukEDiG mKhjlDGKIERXGBVdEW8v4iVVFDyFEVXGAU4u33Q4co27Wx7zUZGHj5Ndh w==; X-IronPort-AV: E=McAfee;i="6600,9927,10735"; a="337219728" X-IronPort-AV: E=Sophos;i="6.00,229,1681196400"; d="scan'208";a="337219728" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2023 05:20:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10735"; a="710348232" X-IronPort-AV: E=Sophos;i="6.00,229,1681196400"; d="scan'208";a="710348232" Received: from amlin-018-114.igk.intel.com ([10.102.18.114]) by orsmga002.jf.intel.com with ESMTP; 09 Jun 2023 05:20:46 -0700 From: Arkadiusz Kubalewski To: kuba@kernel.org, jiri@resnulli.us, arkadiusz.kubalewski@intel.com, vadfed@meta.com, jonathan.lemon@gmail.com, pabeni@redhat.com Cc: corbet@lwn.net, davem@davemloft.net, edumazet@google.com, vadfed@fb.com, jesse.brandeburg@intel.com, anthony.l.nguyen@intel.com, saeedm@nvidia.com, leon@kernel.org, richardcochran@gmail.com, sj@kernel.org, javierm@redhat.com, ricardo.canuelo@collabora.com, mst@redhat.com, tzimmermann@suse.de, michal.michalik@intel.com, gregkh@linuxfoundation.org, jacek.lawrynowicz@linux.intel.com, airlied@redhat.com, ogabbay@kernel.org, arnd@arndb.de, nipun.gupta@amd.com, axboe@kernel.dk, linux@zary.sk, masahiroy@kernel.org, benjamin.tissoires@redhat.com, geert+renesas@glider.be, milena.olech@intel.com, kuniyu@amazon.com, liuhangbin@gmail.com, hkallweit1@gmail.com, andy.ren@getcruise.com, razor@blackwall.org, idosch@nvidia.com, lucien.xin@gmail.com, nicolas.dichtel@6wind.com, phil@nwl.cc, claudiajkang@gmail.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, intel-wired-lan@lists.osuosl.org, linux-rdma@vger.kernel.org, linux-arm-kernel@lists.infradead.org, poros@redhat.com, mschmidt@redhat.com, linux-clk@vger.kernel.org, vadim.fedorenko@linux.dev Subject: [RFC PATCH v8 00/10] Create common DPLL configuration API Date: Fri, 9 Jun 2023 14:18:43 +0200 Message-Id: <20230609121853.3607724-1-arkadiusz.kubalewski@intel.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Implement common API for clock/DPLL configuration and status reporting. The API utilises netlink interface as transport for commands and event notifications. This API aim to extend current pin configuration and make it flexible and easy to cover special configurations. Netlink interface is based on ynl spec, it allows use of in-kernel tools/net/ynl/cli.py application to control the interface with properly formated command and json attribute strings. Here are few command examples of how it works with `ice` driver on supported NIC: - dump dpll devices $# ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ --dump device-get [{'clock-id': 282574471561216, 'id': 0, 'lock-status': 'unlocked', 'mode': 'automatic', 'module-name': 'ice', 'type': 'eec'}, {'clock-id': 282574471561216, 'id': 1, 'lock-status': 'unlocked', 'mode': 'automatic', 'module-name': 'ice', 'type': 'pps'}] - get single pin info: $# ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ --do pin-get --json '{"pin-id":2}' {'clock-id': 282574471561216, 'module-name': 'ice', 'pin-board-label': 'C827_0-RCLKA', 'pin-dpll-caps': 6, 'pin-frequency': 1953125, 'pin-id': 2, 'pin-parent': [{'id': 0, 'pin-direction': 'input', 'pin-prio': 11, 'pin-state': 'selectable'}, {'id': 1, 'pin-direction': 'input', 'pin-prio': 9, 'pin-state': 'selectable'}], 'pin-type': 'mux'} - set pin's state on dpll: $# ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ --do pin-set --json '{"pin-id":2, "pin-parent":{"id":1, "pin-state":2}}' - set pin's prio on dpll: $# ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ --do pin-set --json '{"pin-id":2, "pin-parent":{"id":1, "pin-prio":4}}' - set pin's state on parent pin: $# ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ --do pin-set --json '{"pin-id":13, \ "pin-parent":{"pin-id":2, "pin-state":1}}' v7 -> v8: [0/10] Create common DPLL configuration API - reorder the patches in patch series - split patch "[RFC PATCH v7 2/8] dpll: Add DPLL framework base functions" into 3 smaller patches for easier review: - [03/10] dpll: core: Add DPLL framework base functions - [04/10] dpll: netlink: Add DPLL framework base functions - [05/10] dpll: api header: Add DPLL framework base - add cli.py usage examples in commit message [01/10] dpll: documentation on DPLL subsystem interface - fix DPLL_MODE_MANUAL documentation - remove DPLL_MODE_NCO - remove DPLL_LOCK_STATUS_CALIBRATING - add grepability Use full names of commands, attributes and values of dpll subsystem in the documentation - align documentation with changes introduced in v8 - fix typos - fix phrases to better show the intentions - move dpll.rst to Documentation/driver-api/ [02/10] dpll: spec: Add Netlink spec in YAML - remove unspec attribute values - add 10 KHZ and 77,5 KHZ frequency defines - fix documentation - remove assigned values from subset attributes - reorder dpll attributes - fix `device` nested attribute usage, device get is not used on pin-get - temperature with 3 digit float precision - remove enum from subset definitions - move pin-direction to pin-dpll tuple/subset - remove DPLL_MODE_NCO - remove DPLL_LOCK_STATUS_CALIBRATING - fix naming scheme od notification interface functions - separate notifications for pins - rename attribute enum name: dplla -> dpll_a - rename pin-idx to pin-id - remove attributes: pin-parent-idx, device - replace bus-name and dev-name attributes with module-name - replace pin-label with 3 new attributes: pin-board-label, pin-panel-label, pin-package-label - add device-id-get and pin-id-get commands - remove rclk-dev-name atribute - rename DPLL_PIN_DIRECTION_SOURCE -> DPLL_PIN_DIRECTION_INPUT [03/10] dpll: core: Add DPLL framework base functions [04/10] dpll: netlink: Add DPLL framework base functions [05/10] dpll: api header: Add DPLL framework base - remove unspec attributes after removing from dpll netlink spec - move pin-direction to pin-dpll tuple - pass parent_priv on state_on_pin_ - align with new notification definitions from netlink spec - use separated notifications for dpll pins and devices - format notification messages as corresponding get netlink commands - rename pin-idx to pin-id - remove attributes pin-parent-idx, device - use DPLL_A_PIN_PARENT to hold information on parent pin or dpll device - refactor lookup for pins and dplls for dpll subsystem - replace bus-name, dev-name with module-name - replace pin-label with 3 new attributes: pin-board-label, pin-panel-label, pin-package-label - add device-id-get and pin-id-get commands - rename dpll_xa_lock to dpll_lock - improve doxygen in dpll_core.c - remove unused parent and dev fields from dpll_device struct - use u32 for pin_idx in dpll_pin_alloc - use driver provided pin properties struct - verify pin/dpll owner on registering pin - remove const arg modifier for helper _priv functions - remove function declaration _get_by_name() - update SPDX headers - parse netlink set attributes with nlattr array - remove rclk-dev-name attribute - remove device pointer from dpll_pin_register/dpll_device_register - remove redundant doxygen from dpll header - use module_name() to get name of module - add missing/remove outdated kdocs - fix call frequency_set only if available - fix call direction_set only for pin-dpll tuple [06/10] netdev: expose DPLL pin handle for netdevice - rebased on top of v8 changes - use dpll_msg_add_pin_handle() in dpll_pin_find_from_nlattr() and dpll_msg_add_pin_parents() - fixed handle to use DPLL_A_PIN_ID and removed temporary comments - added documentation record for dpll_pin pointer - fixed compilation of net/core/dev.c when CONFIG_DPLL is not enabled - adjusted patch description a bit [07/10] ice: add admin commands to access cgu configuration - Remove unspec attributes after removing from dpll netlink spec. [08/10] ice: implement dpll interface to control cgu - remove unspec attributes - do not store pin flags received in set commands - use pin state field to provide pin state to the caller - remove include of uapi header - remove redundant check against null arguments - propagate lock function return value to the caller - use switch case instead of if statements - fix dev_dbg to dev_err for error cases - fix dpll/pin lookup on dpll subsytem callbacks - fix extack of dpll subsystem callbacks - remove double negation and variable cast - simplify ice_dpll_pin_state_set function - pass parent_priv on state_on_pin_ - remove parent hw_idx lookup - fix use const qualifier for dpll/dpll_pin ops - fix IS_ERR macros usage in ice_dpll - add notify previous source state change - fix mutex locking on releasing pins - use '|=' instead of '+=' when modifing capabilities field - rename ice_dpll_register_pins function - clock_id function to return clock ID on the stack instead of using an output variable - DPLL_LOCK_STATUS_CALIBRATING was removed, return: DPLL_LOCK_STATUS_LOCKED - if dpll was locked DPLL_LOCK_STATUS_LOCKED_HO_ACQ - if dpll was locked and holdover is acquired - propagate and use dpll_priv to obtain pf pointer in corresponding functions. - remove null check for pf pointer - adapt to `dpll: core: fix notification scheme` - expose pf related pin to corresponding netdevice - fix dpll init error path - fix dpll pins naming scheme `source` -> `input` - replace pin-label with pin-board-label - dpll remove parent and dev fields from dpll_device - remove device pointer from dpll_pin_register/dpll_device_register - rename DPLL_PIN_DIRECTION_SOURCE -> DPLL_PIN_DIRECTION_INPUT [09/10] ptp_ocp: implement DPLL ops - replace pin-label with pin-board-label - dpll remove parent and dev fields from dpll_device - remove device pointer from dpll_pin_register/dpll_device_register - rename DPLL_PIN_DIRECTION_SOURCE -> DPLL_PIN_DIRECTION_INPUT [10/10] mlx5: Implement SyncE support using DPLL infrastructure - rebased on top of v8 changes: - changed notification scheme - no need to fill pin label - implemented locked_ho_acq status - rename DPLL_PIN_DIRECTION_SOURCE -> DPLL_PIN_DIRECTION_INPUT - remove device pointer from dpll_pin_register/dpll_device_register - fixed MSEES register writes - adjusted pin state and lock state values reported - fixed a white space issue v6 -> v7: * YAML spec: - remove nested 'pin' attribute - clean up definitions on top of the latest changes * pin object: - pin xarray uses id provided by the driver - remove usage of PIN_IDX_INVALID in set function - source_pin_get() returns object instead of idx - fixes in frequency support API * device and pin operations are const now * small fixes in naming in Makefile and in the functions * single mutex for the subsystem to avoid possible ABBA locks * no special *_priv() helpers anymore, private data is passed as void* * no netlink filters by name anymore, only index is supported * update ptp_ocp and ice drivers to follow new API version * add mlx5e driver as a new customer of the subsystem v5 -> v6: * rework pin part to better fit shared pins use cases * add YAML spec to easy generate user-space apps * simple implementation in ptp_ocp is back again v4 -> v5: * fix code issues found during last reviews: - replace cookie with clock id - follow one naming schema in dpll subsys - move function comments to dpll_core.c, fix exports - remove single-use helper functions - merge device register with alloc - lock and unlock mutex on dpll device release - move dpll_type to uapi header - rename DPLLA_DUMP_FILTER to DPLLA_FILTER - rename dpll_pin_state to dpll_pin_mode - rename DPLL_MODE_FORCED to DPLL_MODE_MANUAL - remove DPLL_CHANGE_PIN_TYPE enum value * rewrite framework once again (Arkadiusz) - add clock class: Provide userspace with clock class value of DPLL with dpll device dump netlink request. Clock class is assigned by driver allocating a dpll device. Clock class values are defined as specified in: ITU-T G.8273.2/Y.1368.2 recommendation. - dpll device naming schema use new pattern: "dpll_%s_%d_%d", where: - %s - dev_name(parent) of parent device, - %d (1) - enum value of dpll type, - %d (2) - device index provided by parent device. - new muxed/shared pin registration: Let the kernel module to register a shared or muxed pin without finding it or its parent. Instead use a parent/shared pin description to find correct pin internally in dpll_core, simplifing a dpll API * Implement complex DPLL design in ice driver (Arkadiusz) * Remove ptp_ocp driver from the series for now v3 -> v4: * redesign framework to make pins dynamically allocated (Arkadiusz) * implement shared pins (Arkadiusz) v2 -> v3: * implement source select mode (Arkadiusz) * add documentation * implementation improvements (Jakub) v1 -> v2: * implement returning supported input/output types * ptp_ocp: follow suggestions from Jonathan * add linux-clk mailing list v0 -> v1: * fix code style and errors * add linux-arm mailing list Arkadiusz Kubalewski (3): dpll: spec: Add Netlink spec in YAML ice: add admin commands to access cgu configuration ice: implement dpll interface to control cgu Jiri Pirko (2): netdev: expose DPLL pin handle for netdevice mlx5: Implement SyncE support using DPLL infrastructure Vadim Fedorenko (5): dpll: documentation on DPLL subsystem interface dpll: core: Add DPLL framework base functions dpll: netlink: Add DPLL framework base functions dpll: api header: Add DPLL framework base functions ptp_ocp: implement DPLL ops Documentation/driver-api/dpll.rst | 458 ++++ Documentation/driver-api/index.rst | 1 + Documentation/netlink/specs/dpll.yaml | 466 ++++ MAINTAINERS | 8 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/dpll/Kconfig | 7 + drivers/dpll/Makefile | 9 + drivers/dpll/dpll_core.c | 953 ++++++++ drivers/dpll/dpll_core.h | 104 + drivers/dpll/dpll_netlink.c | 1195 ++++++++++ drivers/dpll/dpll_netlink.h | 44 + drivers/dpll/dpll_nl.c | 161 ++ drivers/dpll/dpll_nl.h | 50 + drivers/net/ethernet/intel/Kconfig | 1 + drivers/net/ethernet/intel/ice/Makefile | 3 +- drivers/net/ethernet/intel/ice/ice.h | 5 + .../net/ethernet/intel/ice/ice_adminq_cmd.h | 240 +- drivers/net/ethernet/intel/ice/ice_common.c | 467 ++++ drivers/net/ethernet/intel/ice/ice_common.h | 43 + drivers/net/ethernet/intel/ice/ice_dpll.c | 2015 +++++++++++++++++ drivers/net/ethernet/intel/ice/ice_dpll.h | 102 + drivers/net/ethernet/intel/ice/ice_lib.c | 17 +- drivers/net/ethernet/intel/ice/ice_main.c | 7 + drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 414 ++++ drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 230 ++ drivers/net/ethernet/intel/ice/ice_type.h | 1 + .../net/ethernet/mellanox/mlx5/core/Kconfig | 8 + .../net/ethernet/mellanox/mlx5/core/Makefile | 3 + drivers/net/ethernet/mellanox/mlx5/core/dev.c | 17 + .../net/ethernet/mellanox/mlx5/core/dpll.c | 432 ++++ drivers/ptp/Kconfig | 1 + drivers/ptp/ptp_ocp.c | 329 ++- include/linux/dpll.h | 164 ++ include/linux/mlx5/driver.h | 2 + include/linux/mlx5/mlx5_ifc.h | 59 +- include/linux/netdevice.h | 10 + include/uapi/linux/dpll.h | 184 ++ include/uapi/linux/if_link.h | 2 + net/core/dev.c | 22 + net/core/rtnetlink.c | 38 + 41 files changed, 8216 insertions(+), 59 deletions(-) create mode 100644 Documentation/driver-api/dpll.rst create mode 100644 Documentation/netlink/specs/dpll.yaml create mode 100644 drivers/dpll/Kconfig create mode 100644 drivers/dpll/Makefile create mode 100644 drivers/dpll/dpll_core.c create mode 100644 drivers/dpll/dpll_core.h create mode 100644 drivers/dpll/dpll_netlink.c create mode 100644 drivers/dpll/dpll_netlink.h create mode 100644 drivers/dpll/dpll_nl.c create mode 100644 drivers/dpll/dpll_nl.h create mode 100644 drivers/net/ethernet/intel/ice/ice_dpll.c create mode 100644 drivers/net/ethernet/intel/ice/ice_dpll.h create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/dpll.c create mode 100644 include/linux/dpll.h create mode 100644 include/uapi/linux/dpll.h -- 2.37.3