Received: by 2002:a05:6358:3188:b0:123:57c1:9b43 with SMTP id q8csp5194131rwd; Mon, 12 Jun 2023 01:06:43 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7Z3zcsgNiDA/IBZL3RitTsKJHcBLhWUoXUrG0n/BpC9g92owlthF+8kFUyUAMKlcGXb3bH X-Received: by 2002:a19:5009:0:b0:4f3:b588:48d0 with SMTP id e9-20020a195009000000b004f3b58848d0mr3278654lfb.14.1686557203631; Mon, 12 Jun 2023 01:06:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686557203; cv=none; d=google.com; s=arc-20160816; b=I3S1FOFw17PDs7KsS+/Htn2S+Q7OrX+6OYozaq+LTEhfLWP6FXIoXjRDTiFd+9JECr Ih8Ww1JNznh0lv8CJd2DHnE7D/SY2XbM7GjzOOO7pmSnu7Cl+DbjIhIebzluD2Ms4cmH IC6iNvxcjguALfj6qzpBXZoGlqrk7k50RSknSAwKEogsKAPYBtSoLxigu9WiozqPe35D e3mWQaokq7o5lZG/luSb53QyWgw0qlXfsxAntHA51W3jqkhubybRIfEci7eROtUtjhph rTH5tU0Ss9PUoibn3iMo8FGU2HU5MIToMGv8J0dMsSkQNXW8gJVGQMwygoOos2GQrHNx X8AQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=p5WPBTyLepUz7+oEMbEueUmk9ne/lct1vXkFknHF+X0=; b=HezafPfuErw8OH6xjANfQQhusrwSQX/f1siwTIi2gRW3RIn1aW5oa2vNNS6FuaGvBS iXBekBrC3k2CaWxsjvfE0EtsmtvTob6Qxvg7b9IqSBIfpE0B/pErxK3wiTLCyg+Gn76o fTCCh+i2c85kRH8LvkUJSVcmCymP85WAPW5zUth95KO9ToV4ynkjl7eKOr4eZ/CZ6Esj wyFsw9Jrd/GqNM/jtqRdugCQNC60d7vHqFPE6MMIJ2gnHoKAsC50g2/EFfohfMW5Bu8v Pi37B4meZkfSaXeT0ib07QratnS7OCZdode46n7Eywyts3ygFGXWdO5iagddVAG3T6YM 0Jmg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b=lySVczJL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b11-20020aa7c90b000000b00514a41ecf51si3920003edt.353.2023.06.12.01.06.19; Mon, 12 Jun 2023 01:06:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b=lySVczJL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232907AbjFLIBC (ORCPT + 99 others); Mon, 12 Jun 2023 04:01:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229639AbjFLIA3 (ORCPT ); Mon, 12 Jun 2023 04:00:29 -0400 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [IPv6:2a00:1450:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BCB31FEF; Mon, 12 Jun 2023 01:00:00 -0700 (PDT) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-3f7a8089709so41901475e9.1; Mon, 12 Jun 2023 01:00:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686556797; x=1689148797; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=p5WPBTyLepUz7+oEMbEueUmk9ne/lct1vXkFknHF+X0=; b=lySVczJLIzMWApBHBTLPrIPM4QOutgP34UIl2bbmIcelFHbY7oqA6e5VhPlAvElIKG N5kXA5JLliWWHsthHGVV0WtW3+RF3a4kmv+dkpqqObGg8L0cY/AC0MUm0+K1k1kR+pd6 G230V9eOLel6WJBvkxKodiYhRt6lWMzAzI05YbIuhA7kPtyc5CeLREX7ClGDHe8/CDzH aIXpkimPD+10/HK8pDfCPBk3qvSAZVWsyfuUWQZrtuf8a97KgoS5Fv/CPw4Pd/kmAfL3 TphW84q/TIapGtIs6a7IV2vakhSO1VsXBMJPppMY+DOQ1449DPVtxpK20RYQwZPZAIsE tN2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686556797; x=1689148797; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p5WPBTyLepUz7+oEMbEueUmk9ne/lct1vXkFknHF+X0=; b=ZZvPdPfhpd3YreyToeK4FDxjfNvnYMtABkbGiUpZuryXEwHRdjclcXxjijDUXVEfA+ kfDT+a4UNnKBkQCvy9zY0J3NU+1ZHjQB+dNUTzZqAy+zhy0+IP2f+IGLYJAiGVfTEZa1 NgT86IRvz5m/zEn9TJAG6Xwk0RRKvWbZ+WoL1+TWk3Ty0y4pyvKo4GYwqVMt8Q5fH2cW bgrnw7e5zedAc1s0OvsUPslJgEWSI7IUqPjyNGNlyYPBsU3pQ1rCYdu3YadGgsyOUnIJ ycvl9Iq+sx1sxbHeqFhxYKumgadMFgOdxyus5ZS8i7naKH8BF35JjvCK9PdIUGB4o+re A4fA== X-Gm-Message-State: AC+VfDwFmY+iq71sdJpQnobmVTS3oU0qsiEDC/Y6ZLrnchQolZ7Iv4Qz HNM3IrIVX4NkbWWWQY5G6E4= X-Received: by 2002:a1c:7c0e:0:b0:3f6:3bd:77dc with SMTP id x14-20020a1c7c0e000000b003f603bd77dcmr6215344wmc.23.1686556796734; Mon, 12 Jun 2023 00:59:56 -0700 (PDT) Received: from arinc9-Xeront.lan (178-147-169-233.haap.dm.cosmote.net. [178.147.169.233]) by smtp.gmail.com with ESMTPSA id y22-20020a7bcd96000000b003f7f2a1484csm10552195wmj.5.2023.06.12.00.59.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 00:59:56 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: Landen Chao , Frank Wunderlich , Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net v4 1/7] net: dsa: mt7530: fix trapping frames with multiple CPU ports on MT7531 Date: Mon, 12 Jun 2023 10:59:39 +0300 Message-Id: <20230612075945.16330-2-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612075945.16330-1-arinc.unal@arinc9.com> References: <20230612075945.16330-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Arınç ÜNAL Every bit of the CPU port bitmap for MT7531 and the switch on the MT7988 SoC represents a CPU port to trap frames to. These switches trap frames received from a user port to the CPU port that is affine to the user port from which the frames are received. Currently, only the bit that corresponds to the first found CPU port is set on the bitmap. When multiple CPU ports are being used, the trapped frames from the user ports not affine to the first CPU port will be dropped as the other CPU port is not set on the bitmap. The switch on the MT7988 SoC is not affected as there's only one port to be used as a CPU port. To fix this, introduce the MT7531_CPU_PMAP macro to individually set the bits of the CPU port bitmap. Set the CPU port bitmap for MT7531 and the switch on the MT7988 SoC on mt753x_cpu_port_enable() which runs on a loop for each CPU port. Add a comment to explain frame trapping for these switches. According to the document MT7531 Reference Manual for Development Board v1.0, the MT7531_CPU_PMAP bits are unset after reset so no need to clear it beforehand. Since there's currently no public document for the switch on the MT7988 SoC, I assume this is also the case for this switch. Fixes: c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch") Signed-off-by: Arınç ÜNAL --- drivers/net/dsa/mt7530.c | 16 +++++++++------- drivers/net/dsa/mt7530.h | 1 + 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 9bc54e1348cb..b1657679e69d 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -1010,6 +1010,14 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int port) if (priv->id == ID_MT7621) mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port)); + /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on + * the MT7988 SoC. Frames received from a user port which are set for + * trapping to CPU port will be trapped to the CPU port that is affine + * to the user port from which the frames are received. + */ + if (priv->id == ID_MT7531 || priv->id == ID_MT7988) + mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port))); + /* CPU port gets connected to all user ports of * the switch. */ @@ -2352,15 +2360,9 @@ static int mt7531_setup_common(struct dsa_switch *ds) { struct mt7530_priv *priv = ds->priv; - struct dsa_port *cpu_dp; int ret, i; - /* BPDU to CPU port */ - dsa_switch_for_each_cpu_port(cpu_dp, ds) { - mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK, - BIT(cpu_dp->index)); - break; - } + /* Trap BPDUs to the CPU port(s) */ mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK, MT753X_BPDU_CPU_ONLY); diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 5084f48a8869..e590cf43f3ae 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -54,6 +54,7 @@ enum mt753x_id { #define MT7531_MIRROR_PORT_GET(x) (((x) >> 16) & MIRROR_MASK) #define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16) #define MT7531_CPU_PMAP_MASK GENMASK(7, 0) +#define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x) #define MT753X_MIRROR_REG(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ MT7531_CFC : MT7530_MFC) -- 2.39.2