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Mon, 12 Jun 2023 09:35:48 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2957810002A; Mon, 12 Jun 2023 09:35:47 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 1B557216835; Mon, 12 Jun 2023 09:35:47 +0200 (CEST) Received: from [10.201.21.93] (10.201.21.93) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Mon, 12 Jun 2023 09:35:46 +0200 Message-ID: <3580b822-1d6e-91af-3f5b-f076a8aaddf1@foss.st.com> Date: Mon, 12 Jun 2023 09:35:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [RESEND PATCH v2 2/6] ARM: dts: stm32: add pin map for LTDC on stm32f7 To: Dario Binacchi CC: , Raphael Gallais-Pou , , , Philippe Cornu , Amarula patchwork , Maxime Coquelin , , , Conor Dooley , Krzysztof Kozlowski , Rob Herring , References: <20230607063139.621351-1-dario.binacchi@amarulasolutions.com> <20230607063139.621351-3-dario.binacchi@amarulasolutions.com> <7139fb21-6a1d-a26f-fef3-d3154d234ca2@foss.st.com> Content-Language: en-US From: Alexandre TORGUE In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.201.21.93] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-12_04,2023-06-09_01,2023-05-22_02 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,NICE_REPLY_A,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org hi Dario On 6/9/23 08:21, Dario Binacchi wrote: > Hi Alexandre, > > On Thu, Jun 8, 2023 at 2:42 PM Alexandre TORGUE > wrote: >> >> Hi Dario >> >> On 6/7/23 08:31, Dario Binacchi wrote: >>> Add pin configurations for using LTDC (LCD-tft Display Controller) on >>> stm32f746-disco board. >>> >>> Signed-off-by: Dario Binacchi >>> --- >>> >>> (no changes since v1) >>> >>> arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 35 ++++++++++++++++++++++++++ >>> 1 file changed, 35 insertions(+) >>> >>> diff --git a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi >>> index 9f65403295ca..f3f90b9bcd61 100644 >>> --- a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi >>> +++ b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi >>> @@ -365,6 +365,41 @@ pins2 { >>> bias-pull-up; >>> }; >>> }; >>> + >>> + >>> + ltdc_pins_a: ltdc-pins-a-0 { >> >> ltdc-pins-a-0 --> ltdc-pins-0 is a bit cleaner. I know that I have to >> fix sdio pins nodes in this file to keep the same spirit for all group >> names. > > I have looked at the file arch/arm/boot/dts/stm32f7-pinctrl.dtsi, and > based on the following nodes: > usart1_pins_a: usart1-0 > i2c1_pins_b: i2c1-0 > can1_pins_a: can1-0 > > I have decided to rename ltdc-pins-a-0 to ltdc-0. > > I hope you agree. Yes! perfect. Alex > > Thanks and regards, > > Dario > >> >> If there is no V3 I wil do it directly when I'll apply DT patches if you >> agree. >> >> Alex >> >> >>> + pins { >>> + pinmux = , /* LCD_B0 */ >>> + , /* LCD_B4 */ >>> + , /* LCD_VSYNC */ >>> + , /* LCD_HSYNC */ >>> + , /* LCD_CLK */ >>> + , /* LCD_R0 */ >>> + , /* LCD_R1 */ >>> + , /* LCD_R2 */ >>> + , /* LCD_R3 */ >>> + , /* LCD_R4 */ >>> + , /* LCD_R5 */ >>> + , /* LCD_R6 */ >>> + , /* LCD_R7 */ >>> + , /* LCD_G0 */ >>> + , /* LCD_G1 */ >>> + , /* LCD_G2 */ >>> + , /* LCD_G3 */ >>> + , /* LCD_G4 */ >>> + , /* LCD_B1 */ >>> + , /* LCD_B2 */ >>> + , /* LCD_B3 */ >>> + , /* LCD_G5 */ >>> + , /* LCD_G6 */ >>> + , /* LCD_G7 */ >>> + , /* LCD_B5 */ >>> + , /* LCD_B6 */ >>> + , /* LCD_B7 */ >>> + ; /* LCD_DE */ >>> + slew-rate = <2>; >>> + }; >>> + }; >>> }; >>> }; >>> }; >> > >