Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Mon, 12 Jun 2023 13:50:54 +0300
From:   Vladimir Oltean <olteanv@gmail.com>
To:     "Russell King (Oracle)" <linux@armlinux.org.uk>
Cc:     =?utf-8?B?QXLEsW7DpyDDnE5BTA==?= <arinc.unal@arinc9.com>,
        Daniel Golle <daniel@makrotopia.org>,
        Landen Chao <Landen.Chao@mediatek.com>,
        DENG Qingfang <dqfext@gmail.com>,
        Sean Wang <sean.wang@mediatek.com>,
        Andrew Lunn <andrew@lunn.ch>,
        Florian Fainelli <f.fainelli@gmail.com>,
        "David S. Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>,
        Frank Wunderlich <frank-w@public-files.de>,
        Bartel Eerdekens <bartel.eerdekens@constell8.be>,
        mithat.guner@xeront.com, erkin.bozoglu@xeront.com,
        linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org
Subject: Re: [PATCH net v2 1/7] net: dsa: mt7530: fix trapping frames with
 multiple CPU ports on MT7531
Message-ID: <20230612105054.fqv46qpnpf2ktc3b@skbuf>
References: <20230611081547.26747-1-arinc.unal@arinc9.com>
 <ZIXwc0V5Ye6xrpmn@shell.armlinux.org.uk>
 <9d571682-7271-2a5e-8079-900d14a5d7cd@arinc9.com>
 <ZIbuxohDqHA0S7QP@shell.armlinux.org.uk>
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Disposition: inline
Content-Transfer-Encoding: 8bit
In-Reply-To: <ZIbuxohDqHA0S7QP@shell.armlinux.org.uk>
Precedence: bulk

On Mon, Jun 12, 2023 at 11:09:10AM +0100, Russell King (Oracle) wrote:
> > Yes but it's not the affinity we set here. It's to enable the CPU port for
> > trapping.
> 
> In light of that, is the problem that we only enable one CPU port to
> receive trapped frames from their affine user ports?

The badly explained problem is that this driver is not coded up to handle
device trees with multiple CPU ports in the way that is desirable for Arınç.

Namely, when both CPU ports 5 and 6 are described in the device tree,
DSA currently chooses port 5 as the active and unchangeable CPU port.
That works, however it is not desirable for Arınç for performance reasons,
as explained in commit "net: dsa: introduce preferred_default_local_cpu_port
and use on MT7530" from this series.

So that change makes DSA choose port 6 as the active and unchangeable
CPU port. But as a preliminary change for that to work, one would need
to remove the current built-in assumption of the mt7530 driver: that the
active and unchangeable CPU port is also the first CPU port.

This change builds on the observation that there is no problem when all
CPU ports described in the device tree are set in the CPU port bitmap,
regardless of whether they are active or not. This is because packet
trapping on these switch sub-families follows the user to CPU port
affinity, and inactive CPU ports have no user ports affine to them.