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Date:   Mon, 12 Jun 2023 13:22:09 +0200
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Subject: Re: [PATCH v18 1/3] ARM: dts: nuvoton: Add node for NPCM memory
 controller
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To:     Borislav Petkov <bp@alien8.de>, Marvin Lin <milkfafa@gmail.com>
Cc:     robh+dt@kernel.org, tony.luck@intel.com, james.morse@arm.com,
        mchehab@kernel.org, rric@kernel.org, benjaminfair@google.com,
        yuenn@google.com, venture@google.com, avifishman70@gmail.com,
        tmaimon77@gmail.com, tali.perry1@gmail.com,
        linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, openbmc@lists.ozlabs.org,
        KWLIU@nuvoton.com, YSCHU@nuvoton.com, ctcchien@nuvoton.com,
        kflin@nuvoton.com
References: <20230111093245.318745-1-milkfafa@gmail.com>
 <20230111093245.318745-2-milkfafa@gmail.com>
 <20230612110401.GPZIb7oZPdsPGFzSDc@fat_crate.local>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <20230612110401.GPZIb7oZPdsPGFzSDc@fat_crate.local>
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On 12/06/2023 13:04, Borislav Petkov wrote:
> On Wed, Jan 11, 2023 at 05:32:43PM +0800, Marvin Lin wrote:
>> Add node for memory controller present on Nuvoton NPCM SoCs. The
>> memory controller supports single bit error correction and double bit
>> error detection.
>>
>> Signed-off-by: Marvin Lin <milkfafa@gmail.com>
>> ---
>>  arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++
>>  1 file changed, 7 insertions(+)
> 
> I guess this needs an Ack from OF folks if it is going to go through the
> EDAC tree ...

It is preferred this goes via Nuvoton ARM SoC tree. I don't understand
why this is first in the series - it's clearly wrong.

Best regards,
Krzysztof