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Date:   Mon, 12 Jun 2023 12:33:25 +0100
From:   "Russell King (Oracle)" <linux@armlinux.org.uk>
To:     Daniel Golle <daniel@makrotopia.org>
Cc:     netdev@vger.kernel.org, linux-mediatek@lists.infradead.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
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        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Lorenzo Bianconi <lorenzo@kernel.org>,
        Mark Lee <Mark-MC.Lee@mediatek.com>,
        Sean Wang <sean.wang@mediatek.com>,
        John Crispin <john@phrozen.org>, Felix Fietkau <nbd@nbd.name>,
        Conor Dooley <conor+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Eric Dumazet <edumazet@google.com>,
        "David S. Miller" <davem@davemloft.net>,
        Sam Shih <Sam.Shih@mediatek.com>
Subject: Re: [PATCH net-next 8/8] net: ethernet: mtk_eth_soc: add basic
 support for MT7988 SoC
Message-ID: <ZIcChW9FTHm+HbYV@shell.armlinux.org.uk>
References: <ZIUYubFtVGYHhlMt@makrotopia.org>
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Sender: Russell King (Oracle) <linux@armlinux.org.uk>
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On Sun, Jun 11, 2023 at 01:43:37AM +0100, Daniel Golle wrote:
>  	if (updated) {
> -		val = mtk_r32(eth, MTK_MAC_MISC);
> +		val = mtk_r32(eth, reg);
>  		val = (val & mask) | set;
> -		mtk_w32(eth, val, MTK_MAC_MISC);
> +		mtk_w32(eth, val, reg);

mtk_m32() ?

> +	/* Force Port1 XGMAC Link Up */
> +	val = mtk_r32(eth, MTK_XGMAC_STS(MTK_GMAC1_ID));
> +	mtk_w32(eth, val | MTK_XGMAC_FORCE_LINK(MTK_GMAC1_ID),
> +		MTK_XGMAC_STS(MTK_GMAC1_ID));
> +
> +	/* Adjust GSW bridge IPG to 11 */
> +	val = mtk_r32(eth, MTK_GSW_CFG);
> +	val &= ~(GSWTX_IPG_MASK | GSWRX_IPG_MASK);
> +	val |= (GSW_IPG_11 << GSWTX_IPG_SHIFT) |
> +	       (GSW_IPG_11 << GSWRX_IPG_SHIFT);
> +	mtk_w32(eth, val, MTK_GSW_CFG);

mtk_m32() for both these?

> +	/* Setup gmac */
> +	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) &&
> +	    mac->interface == PHY_INTERFACE_MODE_INTERNAL) {
> +		mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id));
> +		mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id));
> +
> +		mtk_setup_bridge_switch(eth);


I think this should be documented somewhere - that
PHY_INTERFACE_MODE_INTERNAL means the MAC is connected to a switch.
However, I'm not sure that's the best condition to use - don't we have a
way for a MAC to test if it's connected to a DSA switch?

> +	/* Configure MDC Turbo Mode */
> +	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) {
> +		val = mtk_r32(eth, MTK_MAC_MISC_V3);
> +		val |= MISC_MDC_TURBO;
> +		mtk_w32(eth, val, MTK_MAC_MISC_V3);
> +	}
>  	val = mtk_r32(eth, MTK_PPSC);
> +	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1) ||
> +	    MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
> +		val |= PPSC_MDC_TURBO;
> +
> +	/* Configure MDC Divider */
>  	val &= ~PPSC_MDC_CFG;
> -	val |= FIELD_PREP(PPSC_MDC_CFG, divider) | PPSC_MDC_TURBO;
> +	val |= FIELD_PREP(PPSC_MDC_CFG, divider);
>  	mtk_w32(eth, val, MTK_PPSC);

More opportunities for mtk_m32().

> +	if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_NETSYS_V3_BIT) &&
> +	    MTK_HAS_CAPS(mac->hw->soc->caps, MTK_ESW_BIT) &&
> +	    id == MTK_GMAC1_ID) {
> +		mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE |
> +						       MAC_SYM_PAUSE |
> +						       MAC_10000FD;
> +		phy_interface_zero(mac->phylink_config.supported_interfaces);

Were there bits set that you don't want?

Thanks!

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!