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From:   Ulf Hansson <ulf.hansson@linaro.org>
Date:   Mon, 12 Jun 2023 16:16:18 +0200
Message-ID: <CAPDyKFo7MWvW25YBAELHA+8kZ8xFjX2Pkgusih_p4uVLxLEgQg@mail.gmail.com>
Subject: Re: [PATCH V1 1/1] mmc: sdhci: fix DMA configure compatibility issue
 when 64bit DMA mode is used.
To:     "Chevron Li (WH)" <chevron.li@bayhubtech.com>
Cc:     Chevron Li <chevron_li@126.com>,
        "adrian.hunter@intel.com" <adrian.hunter@intel.com>,
        "linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Shirley Her(SC)" <shirley.her@bayhubtech.com>,
        "XiaoGuang Yu (WH)" <xiaoguang.yu@bayhubtech.com>,
        "Shaper Liu (WH)" <shaper.liu@bayhubtech.com>,
        "Justin Wang (WH)" <justin.wang@bayhubtech.com>
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On Fri, 9 Jun 2023 at 03:58, Chevron Li (WH) <chevron.li@bayhubtech.com> wrote:
>
> Hi, Ulf,
>
> Yes, this patch fixes a real problem.
>
> BR,
> Chevron
>
> > -----Original Message-----
> > From: Ulf Hansson <ulf.hansson@linaro.org>
> > Sent: Thursday, June 8, 2023 23:53
> > To: Chevron Li <chevron_li@126.com>
> > Cc: adrian.hunter@intel.com; linux-mmc@vger.kernel.org; linux-
> > kernel@vger.kernel.org; Shirley Her(SC) <shirley.her@bayhubtech.com>;
> > XiaoGuang Yu (WH) <xiaoguang.yu@bayhubtech.com>; Shaper Liu (WH)
> > <shaper.liu@bayhubtech.com>; Justin Wang (WH)
> > <justin.wang@bayhubtech.com>; Chevron Li (WH)
> > <chevron.li@bayhubtech.com>
> > Subject: Re: [PATCH V1 1/1] mmc: sdhci: fix DMA configure compatibility issue
> > when 64bit DMA mode is used.
> >
> > On Tue, 23 May 2023 at 13:12, Chevron Li <chevron_li@126.com> wrote:
> > >
> > > From: Chevron Li <chevron.li@bayhubtech.com>
> > >
> > > Bayhub SD host has hardware limitation:
> > > 1.The upper 32bit address is inhibited to be written at SD Host Register
> > >   [03E][13]=0 (32bits addressing) mode, is admitted to be written only at
> > >   SD Host Register [03E][13]=1 (64bits addressing) mode.
> > > 2.Because of above item#1, need to configure SD Host Register [03E][13] to
> > >   1(64bits addressing mode) before set 64bit ADMA system address's higher
> > >   32bits SD Host Register [05F~05C] if 64 bits addressing mode is used.
> > >
> > > The hardware limitation is reasonable for below reasons:
> > > 1.Normal flow should set DMA working mode first, then do
> > >   DMA-transfer-related configuration, such as system address.
> > > 2.The hardware limitation may avoid the software to configure wrong higher
> > >   32bit address at 32bits addressing mode although it is redundant.
> > >
> > > The change that set 32bits/64bits addressing mode before set ADMA
> > address,
> > >   has no side-effect to other host IPs for below reason:
> > > The setting order is reasonable and standard: DMA Mode setting first and
> > >   then DMA address setting. It meets all DMA setting sequence.
> > >
> > > Signed-off-by: Chevron Li <chevron.li@bayhubtech.com>
> >
> > Applied for next, thanks!
> >
> > Is this material for stable kernels too, as it fixes a real problem, no?
> Yes, it fixes a real problem.

Okay, I have amended the patch by adding a stable tag to it!

[...]

Kind regards
Uffe