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Date:   Mon, 12 Jun 2023 18:44:37 +0300
From:   Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To:     Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc:     Alessandro Zummo <a.zummo@towertech.it>,
        Alexandre Belloni <alexandre.belloni@bootlin.com>,
        devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>, linux-rtc@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/8] rtc: isl12022: add support for trip level DT bindings
Message-ID: <ZIc9ZUsEt+KNaiKD@smile.fi.intel.com>
References: <20230612113059.247275-1-linux@rasmusvillemoes.dk>
 <20230612113059.247275-5-linux@rasmusvillemoes.dk>
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On Mon, Jun 12, 2023 at 01:30:54PM +0200, Rasmus Villemoes wrote:
> Implement support for using the values given in the
> isil,trip-level[87]5-microvolt properties to set appropriate values in
> the VB[87]5TP bits in the PWR_VBAT register.

...

> +	for (x85 = 0; x85 < ARRAY_SIZE(trip_level85) - 1; ++x85)
> +		if (level85 <= trip_level85[x85])
> +			break;
> +
> +	for (x75 = 0; x75 < ARRAY_SIZE(trip_level75) - 1; ++x75)
> +		if (level75 <= trip_level75[x75])
> +			break;

Does preincrement give us anything in comparison to postincrement?

-- 
With Best Regards,
Andy Shevchenko