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From:   "GONG, Ruiqi" <gongruiqi@huaweicloud.com>
To:     Geert Uytterhoeven <geert+renesas@glider.be>
Cc:     Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org, gongruiqi1@huawei.com
Subject: [PATCH] clk: renesas: r8a7778: remove checker warnings: x | !y
Date:   Tue, 13 Jun 2023 10:54:03 +0800
Message-Id: <20230613025403.3338129-1-gongruiqi@huaweicloud.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Eliminate the following Sparse reports when building with C=1:

drivers/clk/renesas/clk-r8a7778.c:85:52: warning: dubious: x | !y
drivers/clk/renesas/clk-r8a7778.c:87:50: warning: dubious: x | !y

Signed-off-by: GONG, Ruiqi <gongruiqi@huaweicloud.com>
---
 drivers/clk/renesas/clk-r8a7778.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/renesas/clk-r8a7778.c b/drivers/clk/renesas/clk-r8a7778.c
index 797556259370..ad1a50f3b0cd 100644
--- a/drivers/clk/renesas/clk-r8a7778.c
+++ b/drivers/clk/renesas/clk-r8a7778.c
@@ -81,11 +81,11 @@ static void __init r8a7778_cpg_clocks_init(struct device_node *np)
 
 	BUG_ON(!(mode & BIT(19)));
 
-	cpg_mode_rates = (!!(mode & BIT(18)) << 2) |
-			 (!!(mode & BIT(12)) << 1) |
-			 (!!(mode & BIT(11)));
-	cpg_mode_divs = (!!(mode & BIT(2)) << 1) |
-			(!!(mode & BIT(1)));
+	cpg_mode_rates = (mode & BIT(18) ? BIT(2) : 0) |
+			 (mode & BIT(12) ? BIT(1) : 0) |
+			 (mode & BIT(11) ? BIT(0) : 0);
+	cpg_mode_divs = (mode & BIT(2) ? BIT(1) : 0) |
+			(mode & BIT(1) ? BIT(0) : 0);
 
 	num_clks = of_property_count_strings(np, "clock-output-names");
 	if (num_clks < 0) {
-- 
2.25.1