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Tue, 13 Jun 2023 02:36:58 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.9.0-alpha0-492-g08e3be04ba-fm-20230607.003-g08e3be04 Mime-Version: 1.0 Message-Id: <75071be8-272d-45e7-989f-5d717f313fe2@app.fastmail.com> In-Reply-To: <20230228215435.3366914-3-heiko@sntech.de> References: <20230228215435.3366914-1-heiko@sntech.de> <20230228215435.3366914-3-heiko@sntech.de> Date: Tue, 13 Jun 2023 02:35:53 -0400 From: "Stefan O'Rear" To: "Heiko Stuebner" , palmer@dabbelt.com Cc: linux-riscv@lists.infradead.org, samuel@sholland.org, guoren@kernel.org, christoph.muellner@vrull.eu, conor.dooley@microchip.com, linux-kernel@vger.kernel.org, "Heiko Stuebner" Subject: Re: [PATCH RFC 2/2] RISC-V: add T-Head vector errata handling Content-Type: text/plain X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 28, 2023, at 4:54 PM, Heiko Stuebner wrote: > @@ -29,6 +78,7 @@ static __always_inline bool has_vector(void) > static inline void __vstate_clean(struct pt_regs *regs) > { > regs->status = (regs->status & ~(SR_VS)) | SR_VS_CLEAN; > + > } > > static inline void vstate_off(struct pt_regs *regs) > @@ -58,30 +108,75 @@ static __always_inline void rvv_disable(void) > > static __always_inline void __vstate_csr_save(struct __riscv_v_state *dest) > { > - asm volatile ( > + register u32 t1 asm("t1") = (SR_FS); > + > + /* > + * CSR_VCSR is defined as > + * [2:1] - vxrm[1:0] > + * [0] - vxsat > + * The earlier vector spec implemented by T-Head uses separate > + * registers for the same bit-elements, so just combine those > + * into the existing output field. > + * > + * Additionally T-Head cores need FS to be enabled when accessing > + * the VXRM and VXSAT CSRs, otherwise ending in illegal instructions. > + */ > + asm volatile (ALTERNATIVE( > "csrr %0, " CSR_STR(CSR_VSTART) "\n\t" > "csrr %1, " CSR_STR(CSR_VTYPE) "\n\t" > "csrr %2, " CSR_STR(CSR_VL) "\n\t" > "csrr %3, " CSR_STR(CSR_VCSR) "\n\t" > + __nops(5), > + "csrs sstatus, t1\n\t" > + "csrr %0, " CSR_STR(CSR_VSTART) "\n\t" > + "csrr %1, " CSR_STR(CSR_VTYPE) "\n\t" > + "csrr %2, " CSR_STR(CSR_VL) "\n\t" > + "csrr %3, " CSR_STR(THEAD_C9XX_CSR_VXRM) "\n\t" > + "slliw %3, %3, " CSR_STR(VCSR_VXRM_SHIFT) "\n\t" > + "csrr t4, " CSR_STR(THEAD_C9XX_CSR_VXSAT) "\n\t" > + "or %3, %3, t4\n\t" > + "csrc sstatus, t1\n\t", > + THEAD_VENDOR_ID, > + ERRATA_THEAD_VECTOR, CONFIG_ERRATA_THEAD_VECTOR) > : "=r" (dest->vstart), "=r" (dest->vtype), "=r" (dest->vl), > - "=r" (dest->vcsr) : :); > + "=r" (dest->vcsr) : "r"(t1) : "t4"); > } > > static __always_inline void __vstate_csr_restore(struct __riscv_v_state *src) > { > - asm volatile ( > + register u32 t1 asm("t1") = (SR_FS); > + > + /* > + * Similar to __vstate_csr_save above, restore values for the > + * separate VXRM and VXSAT CSRs from the vcsr variable. > + */ > + asm volatile (ALTERNATIVE( > "vsetvl x0, %2, %1\n\t" > "csrw " CSR_STR(CSR_VSTART) ", %0\n\t" > "csrw " CSR_STR(CSR_VCSR) ", %3\n\t" > + __nops(6), > + "csrs sstatus, t1\n\t" > + "vsetvl x0, %2, %1\n\t" > + "csrw " CSR_STR(CSR_VSTART) ", %0\n\t" > + "srliw t4, %3, " CSR_STR(VCSR_VXRM_SHIFT) "\n\t" > + "andi t4, t4, " CSR_STR(VCSR_VXRM_MASK) "\n\t" > + "csrw " CSR_STR(THEAD_C9XX_CSR_VXRM) ", t4\n\t" > + "andi %3, %3, " CSR_STR(VCSR_VXSAT_MASK) "\n\t" > + "csrw " CSR_STR(THEAD_C9XX_CSR_VXSAT) ", %3\n\t" > + "csrc sstatus, t1\n\t", > + THEAD_VENDOR_ID, > + ERRATA_THEAD_VECTOR, CONFIG_ERRATA_THEAD_VECTOR) > : : "r" (src->vstart), "r" (src->vtype), "r" (src->vl), > - "r" (src->vcsr) :); > + "r" (src->vcsr), "r"(t1): "t4"); > } vxrm and vxsat are part of fcsr in 0.7.1, so they should already have been handled by __fstate_save and __fstate_restore, and this code is likely to misbehave (saving the new process's vxrm/vxsat in the old process's save area because float state is swapped before vector state in __switch_to). -s