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Message-ID: <a04f8089-0117-7c22-c6cc-97f5bd42a7d8@linaro.org>
Date:   Tue, 13 Jun 2023 14:12:57 +0200
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Subject: Re: [PATCH v3 07/23] interconnect: qcom: icc-rpm: Allow negative QoS
 offset
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To:     Stephan Gerhold <stephan@gerhold.net>
Cc:     Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Georgi Djakov <djakov@kernel.org>,
        Leo Yan <leo.yan@linaro.org>,
        Evan Green <evgreen@chromium.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Marijn Suijten <marijn.suijten@somainline.org>,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-pm@vger.kernel.org,
        devicetree@vger.kernel.org
References: <20230526-topic-smd_icc-v3-0-5fb7d39b874f@linaro.org>
 <20230526-topic-smd_icc-v3-7-5fb7d39b874f@linaro.org>
 <ZId_qIAL8dvJOwai@gerhold.net>
From:   Konrad Dybcio <konrad.dybcio@linaro.org>
In-Reply-To: <ZId_qIAL8dvJOwai@gerhold.net>
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On 12.06.2023 22:27, Stephan Gerhold wrote:
> On Mon, Jun 12, 2023 at 08:24:24PM +0200, Konrad Dybcio wrote:
>> In some very very very very unfortunate cases, the correct offset of
>> the QoS registers will be.. negative. One such case is MSM8998, where
>> The DDR BWMON occupies what-would-be-the-BIMC-base which we usually
>> take into account with the register calculation, making the actual
>> BIMC node start at what-would-be-the-BIMC-base+0x300.
>>
>> In order to keep the calculation code sane, the simplest - however
>> ugly it may be - solution is to allow the offset to be negative.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> 
> I'm a bit confused why this patch is part of this series. It doesn't
> seem to be directly related.
> 
> Can you send it as part of the series that adds the MSM8998 interconnect
> driver?
Ack

Konrad
> 
> Thanks,
> Stephan
> 
>> ---
>>  drivers/interconnect/qcom/icc-rpm.h | 6 +++---
>>  1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h
>> index d2c04c400cad..ba840a436cc0 100644
>> --- a/drivers/interconnect/qcom/icc-rpm.h
>> +++ b/drivers/interconnect/qcom/icc-rpm.h
>> @@ -29,10 +29,10 @@ enum qcom_icc_type {
>>   * @num_intf_clks: the total number of intf_clks clk_bulk_data entries
>>   * @type: the ICC provider type
>>   * @regmap: regmap for QoS registers read/write access
>> - * @qos_offset: offset to QoS registers
>>   * @bus_clk_rate: bus clock rate in Hz
>>   * @bus_clks: the clk_bulk_data table of bus clocks
>>   * @intf_clks: a clk_bulk_data array of interface clocks
>> + * @qos_offset: offset to QoS registers
>>   * @keep_alive: whether to always keep a minimum vote on the bus clocks
>>   * @is_on: whether the bus is powered on
>>   */
>> @@ -42,7 +42,7 @@ struct qcom_icc_provider {
>>  	int num_intf_clks;
>>  	enum qcom_icc_type type;
>>  	struct regmap *regmap;
>> -	unsigned int qos_offset;
>> +	int qos_offset;
>>  	u64 bus_clk_rate[NUM_BUS_CLKS];
>>  	struct clk_bulk_data bus_clks[NUM_BUS_CLKS];
>>  	struct clk_bulk_data *intf_clks;
>> @@ -108,7 +108,7 @@ struct qcom_icc_desc {
>>  	bool no_clk_scaling;
>>  	enum qcom_icc_type type;
>>  	const struct regmap_config *regmap_cfg;
>> -	unsigned int qos_offset;
>> +	int qos_offset;
>>  };
>>  
>>  /* Valid for all bus types */
>>
>> -- 
>> 2.41.0
>>