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From:   Bjorn Andersson <andersson@kernel.org>
To:     Michael Turquette <mturquette@baylibre.com>,
        Andy Gross <agross@kernel.org>,
        Iskren Chernev <me@iskren.info>,
        Stephen Boyd <sboyd@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>
Cc:     linux-arm-msm@vger.kernel.org,
        Marijn Suijten <marijn.suijten@somainline.org>,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/2] Update parts of PLL_TEST_CTL(_U) if required
Date:   Tue, 13 Jun 2023 16:48:48 -0700
Message-Id: <168670013502.1400697.6968638068672657163.b4-ty@kernel.org>
In-Reply-To: <20230601-topic-alpha_ctl-v1-0-b6a932dfcf68@linaro.org>
References: <20230601-topic-alpha_ctl-v1-0-b6a932dfcf68@linaro.org>
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On Thu, 01 Jun 2023 11:39:06 +0200, Konrad Dybcio wrote:
> Some recent-ish clock drivers touching on the "standard" Alpha PLLs
> have been specifying the values that should be written into the CTL
> registers as mask-value combos, but that wasn't always reflected
> properly (or at all). This series tries to fix that without affecitng
> the drivers that actually provide the full register values.
> 
> 
> [...]

Applied, thanks!

[1/2] clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
      commit: 501624339466a7896bb8a1f048cf8dcfd54b174e
[2/2] clk: qcom: gcc-sm6115: Add missing PLL config properties
      commit: e88c533d8a2a0fe84bb54cff1569bd079ad3512c

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>