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[2620:137:e000::1:20]) by mx.google.com with ESMTP id u9-20020a170906c40900b00977c8b7adf9si8265718ejz.641.2023.06.14.06.07.43; Wed, 14 Jun 2023 06:08:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244633AbjFNMdd (ORCPT + 99 others); Wed, 14 Jun 2023 08:33:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244606AbjFNMd0 (ORCPT ); Wed, 14 Jun 2023 08:33:26 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB5602125 for ; Wed, 14 Jun 2023 05:33:10 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1q9Pg9-00018L-46; Wed, 14 Jun 2023 14:32:49 +0200 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1q9Pg8-007Lpi-B3; Wed, 14 Jun 2023 14:32:48 +0200 Received: from lgo by dude03.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1q9Pg7-00HUL8-9L; Wed, 14 Jun 2023 14:32:47 +0200 From: =?UTF-8?q?Leonard=20G=C3=B6hrs?= To: Conor Dooley , Rob Herring , Alexandre TORGUE , Krzysztof Kozlowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin Cc: kernel@pengutronix.de, =?UTF-8?q?Leonard=20G=C3=B6hrs?= , devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/8] ARM: dts: stm32: Add pinmux groups for Linux Automation GmbH TAC Date: Wed, 14 Jun 2023 14:32:20 +0200 Message-Id: <20230614123222.4167460-7-l.goehrs@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230614123222.4167460-1-l.goehrs@pengutronix.de> References: <20230614123222.4167460-1-l.goehrs@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: lgo@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add pinmux groups required for the Linux Automation GmbH TAC. Signed-off-by: Leonard Göhrs --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 129 +++++++++++++++++++++++ 1 file changed, 129 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 06e969aa5fdb9..01e1e13408644 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -6,6 +6,17 @@ #include &pinctrl { + adc1_ain_pins_a: adc1-ain-0 { + pins { + pinmux = , /* ADC1_INP2 */ + , /* ADC1_INP5 */ + , /* ADC1_INP9 */ + , /* ADC1_INP10 */ + , /* ADC1_INP13 */ + ; /* ADC1_INP15 */ + }; + }; + adc1_in6_pins_a: adc1-in6-0 { pins { pinmux = ; @@ -391,6 +402,46 @@ pins1 { }; }; + ethernet0_rgmii_pins_e: rgmii-4 { + pins1 { + pinmux = , /* ETH_RGMII_GTX_CLK */ + , /* ETH_RGMII_TXD0 */ + , /* ETH_RGMII_TXD1 */ + , /* ETH_RGMII_TXD2 */ + , /* ETH_RGMII_TXD3 */ + ; /* ETH_RGMII_TX_CTL */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + pins2 { + pinmux = , /* ETH_RGMII_RXD0 */ + , /* ETH_RGMII_RXD1 */ + , /* ETH_RGMII_RXD2 */ + , /* ETH_RGMII_RXD3 */ + , /* ETH_RGMII_RX_CLK */ + ; /* ETH_RGMII_RX_CTL */ + bias-disable; + }; + }; + + ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 { + pins1 { + pinmux = , /* ETH_RGMII_GTX_CLK */ + , /* ETH_RGMII_TXD0 */ + , /* ETH_RGMII_TXD1 */ + , /* ETH_RGMII_TXD2 */ + , /* ETH_RGMII_TXD3 */ + , /* ETH_RGMII_TX_CTL */ + , /* ETH_RGMII_RXD0 */ + , /* ETH_RGMII_RXD1 */ + , /* ETH_RGMII_RXD2 */ + , /* ETH_RGMII_RXD3 */ + , /* ETH_RGMII_RX_CLK */ + ; /* ETH_RGMII_RX_CTL */ + }; + }; + ethernet0_rmii_pins_a: rmii-0 { pins1 { pinmux = , /* ETH1_RMII_TXD0 */ @@ -1154,6 +1205,20 @@ pins { }; }; + pwm1_pins_c: pwm1-2 { + pins { + pinmux = ; /* TIM1_CH2 */ + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm1_sleep_pins_c: pwm1-sleep-2 { + pins { + pinmux = ; /* TIM1_CH2 */ + }; + }; + pwm2_pins_a: pwm2-0 { pins { pinmux = ; /* TIM2_CH4 */ @@ -1280,6 +1345,26 @@ pins { }; }; + pwm8_pins_b: pwm8-1 { + pins { + pinmux = , /* TIM8_CH1 */ + , /* TIM8_CH2 */ + , /* TIM8_CH3 */ + ; /* TIM8_CH4 */ + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm8_sleep_pins_b: pwm8-sleep-1 { + pins { + pinmux = , /* TIM8_CH1 */ + , /* TIM8_CH2 */ + , /* TIM8_CH3 */ + ; /* TIM8_CH4 */ + }; + }; + pwm12_pins_a: pwm12-0 { pins { pinmux = ; /* TIM12_CH1 */ @@ -2074,6 +2159,20 @@ pins2 { }; }; + spi2_pins_c: spi2-2 { + pins1 { + pinmux = , /* SPI2_SCK */ + ; /* SPI2_MOSI */ + bias-disable; + drive-push-pull; + }; + + pins2 { + pinmux = ; /* SPI2_MISO */ + bias-pull-down; + }; + }; + spi4_pins_a: spi4-0 { pins { pinmux = , /* SPI4_SCK */ @@ -2088,6 +2187,21 @@ pins2 { }; }; + spi5_pins_a: spi5-0 { + pins1 { + pinmux = , /* SPI5_SCK */ + ; /* SPI5_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = ; /* SPI5_MISO */ + bias-disable; + }; + }; + stusb1600_pins_a: stusb1600-0 { pins { pinmux = ; @@ -2578,6 +2692,21 @@ pins { }; }; + usart3_pins_f: usart3-5 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART3_RX */ + ; /* USART3_CTS_NSS */ + bias-disable; + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = ; /* OTG_ID */ -- 2.39.2