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Date:   Thu, 15 Jun 2023 17:47:33 +0800
From:   Nylon Chen <nylon.chen@sifive.com>
To:     Andreas Schwab <schwab@suse.de>
Cc:     Conor Dooley <conor.dooley@microchip.com>,
        linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
        jszhang@kernel.org, ajones@ventanamicro.com, aou@eecs.berkeley.edu,
        palmer@dabbelt.com, paul.walmsley@sifive.com,
        greentime.hu@sifive.com, zong.li@sifive.com, nylon7717@gmail.com
Subject: Re: [PATCH v2] RISC-V: Support 32_PCREL relocation type in kernel
 module
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On Thu, Jun 15, 2023 at 11:11:49AM +0200, Andreas Schwab wrote:
> On Jun 15 2023, Nylon Chen wrote:
>
Hi Andreas,
> > Because LLVM currently has it enabled by default(https://reviews.llvm.org/D145164), it will generate this
> > relocation type.
> >
> >>From what I know, GCC will also enable it in the future.
> 
> That's why the kernel explicitly disables it.
Ok, thanks for your feedback, after I cross-tested, there is indeed no relevant relocation type generated.

If this error no longer occurs.

I am open to the idea of adding this patch to the upstream and would like to hear your thoughts on whether it is still necessary. 
> 
> -- 
> Andreas Schwab, SUSE Labs, schwab@suse.de
> GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
> "And now for something completely different."