Received: by 2002:a05:6358:3188:b0:123:57c1:9b43 with SMTP id q8csp2168839rwd; Thu, 15 Jun 2023 23:31:59 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4f/Ljms6A6abhA6ABrmSWdJBO5w13nLoIdTjQp6eaXEz+u59rBgAsPR1i6453oR3Y4WGcT X-Received: by 2002:a05:6a20:4308:b0:10b:f980:18d3 with SMTP id h8-20020a056a20430800b0010bf98018d3mr1754840pzk.1.1686897119069; Thu, 15 Jun 2023 23:31:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686897119; cv=none; d=google.com; s=arc-20160816; b=LI/h0Xs1IqvSmSZg5R14xVxuVogs/xqFbXQ5C15a0aVHqb890LpPW7dCasquN8Ig+0 5iaZSNH0JSo0jD3h64MGa/h6t+INpN4+s7bSrhMGPgsM+buw6W1UeXWoOHXQiAw2r7hw oweLhTdlxVDvNEps9ueqWQvXBsZqFOKFaU/WWCfp/kJ6MVzQgTH2P9948etAmNCFEiGr qP3FgkkByiAXInTT3Dk1sSsfwnfjU6Qqg9nSD9QJ84j+LiRpWE2XO1fsbVqNp05XJJc3 SlHO/uhrtHugeDZIO5mVUkWlMfilzBD6yQdEMGmXu/fHucPN9suDrHo+nQ/a1kN5zb7c WZhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=m3u9/q8xXD62uMjfCb1kU8c+JQNbFBi7AOlxRRgOcqY=; b=fCRcXpPWzi2wMs/U1LqUedagUP/X0SrohBG1MI+yaHk2ilWCoGv+NKBR2N2HrrNgy0 dsHkfrJ0FP+GVyvaSNMB/QrFFEo9jDs1pDV09DfkwKiiZ5ULycAl6T0x0LQfVgnkk3tF 94iPERPspMoUMwaDEAoloSitTq26abDlE6GM/+SgttIk2buoKnadZjUXIaSEEmBrP5ML TIIwzNQd7+dn4fH2uZQBJhDtS488kjZX86AhuRFmxEaQbmChco51pbYXK8bjCafTrZDH FgqS1+hL+ArFL+4ZpZ0sDtP+hVm5NpiZaGqp3ixG+k3s34aldoA0pzvcMxAr20mbT7US 49eg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x9-20020aa79409000000b00666ad95e625si1807568pfo.337.2023.06.15.23.31.45; Thu, 15 Jun 2023 23:31:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244204AbjFPGXy (ORCPT + 99 others); Fri, 16 Jun 2023 02:23:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55286 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241114AbjFPGWW (ORCPT ); Fri, 16 Jun 2023 02:22:22 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F8B62D6B for ; Thu, 15 Jun 2023 23:22:18 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1qA2q7-0006nb-VQ; Fri, 16 Jun 2023 08:21:44 +0200 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1qA2q5-007kxY-Rl; Fri, 16 Jun 2023 08:21:41 +0200 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1qA2q4-003FUS-Lp; Fri, 16 Jun 2023 08:21:40 +0200 From: Sascha Hauer To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Robin Murphy , Vincent Legoll , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, Sebastian Reichel , Sascha Hauer Subject: [PATCH v6 07/26] PM / devfreq: rockchip-dfi: introduce channel mask Date: Fri, 16 Jun 2023 08:20:42 +0200 Message-Id: <20230616062101.601837-8-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230616062101.601837-1-s.hauer@pengutronix.de> References: <20230616062101.601837-1-s.hauer@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Different Rockchip SoC variants have a different number of channels. Introduce a channel mask to make the number of channels configurable from SoC initialization code. Reviewed-by: Sebastian Reichel Link: https://lore.kernel.org/r/20230524083153.2046084-8-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer --- drivers/devfreq/event/rockchip-dfi.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index 126bb744645b6..82de24a027579 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -18,10 +18,11 @@ #include #include #include +#include #include -#define RK3399_DMC_NUM_CH 2 +#define DMC_MAX_CHANNELS 2 /* DDRMON_CTRL */ #define DDRMON_CTRL 0x04 @@ -44,7 +45,7 @@ struct dmc_count_channel { }; struct dmc_count { - struct dmc_count_channel c[RK3399_DMC_NUM_CH]; + struct dmc_count_channel c[DMC_MAX_CHANNELS]; }; /* @@ -61,6 +62,7 @@ struct rockchip_dfi { struct regmap *regmap_pmu; struct clk *clk; u32 ddr_type; + unsigned int channel_mask; }; static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) @@ -95,7 +97,9 @@ static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dm u32 i; void __iomem *dfi_regs = dfi->regs; - for (i = 0; i < RK3399_DMC_NUM_CH; i++) { + for (i = 0; i < DMC_MAX_CHANNELS; i++) { + if (!(dfi->channel_mask & BIT(i))) + continue; count->c[i].access = readl_relaxed(dfi_regs + DDRMON_CH0_DFI_ACCESS_NUM + i * 20); count->c[i].total = readl_relaxed(dfi_regs + @@ -145,9 +149,14 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev, rockchip_dfi_read_counters(edev, &count); /* We can only report one channel, so find the busiest one */ - for (i = 0; i < RK3399_DMC_NUM_CH; i++) { - u32 a = count.c[i].access - last->c[i].access; - u32 t = count.c[i].total - last->c[i].total; + for (i = 0; i < DMC_MAX_CHANNELS; i++) { + u32 a, t; + + if (!(dfi->channel_mask & BIT(i))) + continue; + + a = count.c[i].access - last->c[i].access; + t = count.c[i].total - last->c[i].total; if (a > access) { access = a; @@ -185,6 +194,8 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi) dfi->ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) & RK3399_PMUGRF_DDRTYPE_MASK; + dfi->channel_mask = GENMASK(1, 0); + return 0; }; -- 2.39.2