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Date:   Fri, 16 Jun 2023 12:38:50 +0200
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To:     "Goud, Srinivas" <srinivas.goud@amd.com>,
        Marc Kleine-Budde <mkl@pengutronix.de>
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From:   Krzysztof Kozlowski <krzk@kernel.org>
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On 16/06/2023 12:13, Goud, Srinivas wrote:
>>>>> xlnx,has-ecc is optional property and added to Xilinx CAN Controller
>>>>> node if ECC block enabled in the HW.
>>>>>
>>>>> Signed-off-by: Srinivas Goud <srinivas.goud@amd.com>
>>>>
>>>> Is there a way to introspect the IP core to check if this feature is compiled in?
>>> There is no way(IP registers) to indicate whether ECC feature is enabled or
>> not.
>>
>> Isn't this then deductible from compatible? Your binding claims it is only for
>> AXI CAN, so xlnx,axi-can-1.00.a, even though you did not restrict it in the
>> binding.
> Agree it is only for AXI CAN(xlnx,axi-can-1.00.a) but ECC feature is
> configurable option to the user.
> ECC is added as optional configuration(enable/disable) feature 
> to the existing AXI CAN.

Why boards would like not to have ECC? I understand that someone told
you "make it configurable in DTS", but that's not really a reason for
us. Why this is suitable for DTS?

Best regards,
Krzysztof