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Date:   Sat, 17 Jun 2023 15:07:21 +0200
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Subject: Re: [PATCH v3 2/9] clk: ralink: add clock and reset driver for MTMIPS
 SoCs
To:     Shiji Yang <yangshiji66@outlook.com>, sergio.paracuellos@gmail.com
Cc:     arinc.unal@arinc9.com, devicetree@vger.kernel.org,
        john@phrozen.org, krzysztof.kozlowski+dt@linaro.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-mips@vger.kernel.org, matthias.bgg@gmail.com,
        mturquette@baylibre.com, p.zabel@pengutronix.de,
        robh+dt@kernel.org, sboyd@kernel.org, tsbogend@alpha.franken.de
References: <20230617052435.359177-3-sergio.paracuellos@gmail.com>
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From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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On 17/06/2023 14:54, Shiji Yang wrote:
>> void __init plat_time_init(void)
>> {
>> +	struct of_phandle_args clkspec;
>> 	struct clk *clk;
>> +	int cpu_clk_idx;
>>
>> 	ralink_of_remap();
>>
>> -	ralink_clk_init();
>> -	clk = clk_get_sys("cpu", NULL);
>> +	cpu_clk_idx = clk_cpu_index();
>> +	if (cpu_clk_idx == -1)
>> +		panic("unable to get CPU clock index");
>> +
>> +	of_clk_init(NULL);
>> +	clkspec.np = of_find_node_by_name(NULL, "sysc");
> 
> The node name should be "syscon" as the example node name in the
> dt-bindings document is "syscon".

NAK for both.

Node names must not be an ABI, unless you talk about child of some
device node. I don't think this is the case here. Look by phandle (for a
device context) or by compatible (looks the case here).


Best regards,
Krzysztof