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([2a05:6e02:1041:c10:13d0:1b6c:ce40:5429]) by smtp.googlemail.com with ESMTPSA id c9-20020a05600c0ac900b003f7eeec829asm146142wmr.10.2023.06.19.09.16.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Jun 2023 09:16:26 -0700 (PDT) Message-ID: Date: Mon, 19 Jun 2023 18:16:25 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 1/1] clocksource: hyper-v: Rework clocksource and sched clock setup Content-Language: en-US To: Michael Kelley , kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, tglx@linutronix.de, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org References: <1686325621-16382-1-git-send-email-mikelley@microsoft.com> From: Daniel Lezcano In-Reply-To: <1686325621-16382-1-git-send-email-mikelley@microsoft.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09/06/2023 17:47, Michael Kelley wrote: > Current code assigns either the Hyper-V TSC page or MSR-based ref counter > as the sched clock. This may be sub-optimal in two cases. First, if there > is hardware support to ensure consistent TSC frequency across live > migrations and Hyper-V is using that support, the raw TSC is a faster > source of time than the Hyper-V TSC page. Second, the MSR-based ref > counter is relatively slow because reads require a trap to the hypervisor. > As such, it should never be used as the sched clock. The native sched > clock based on the raw TSC or jiffies is much better. > > Rework the sched clock setup so it is set to the TSC page only if > Hyper-V indicates that the TSC may have inconsistent frequency across > live migrations. Also, remove the code that sets the sched clock to > the MSR-based ref counter. In the cases where it is not set, the sched > clock will then be the native sched clock. > > As part of the rework, always enable both the TSC page clocksource and > the MSR-based ref counter clocksource. Set the ratings so the TSC page > clocksource is preferred. While the MSR-based ref counter clocksource > is unlikely to ever be the default, having it available for manual > selection is convenient for development purposes. > > Signed-off-by: Michael Kelley The patch does not apply, does it depend on another patch? Rejected chunk: --- drivers/clocksource/hyperv_timer.c +++ drivers/clocksource/hyperv_timer.c @@ -485,15 +485,9 @@ static u64 notrace read_hv_clock_msr_cs(struct clocksource *arg) return read_hv_clock_msr(); } -static u64 noinstr read_hv_sched_clock_msr(void) -{ - return (read_hv_clock_msr() - hv_sched_clock_offset) * - (NSEC_PER_SEC / HV_CLOCK_HZ); -} - static struct clocksource hyperv_cs_msr = { .name = "hyperv_clocksource_msr", - .rating = 500, + .rating = 495, .read = read_hv_clock_msr_cs, .mask = CLOCKSOURCE_MASK(64), .flags = CLOCK_SOURCE_IS_CONTINUOUS, -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog