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This patch is actually a preparation for later patch 10 to implement fine-grained zap. If when CR0.CD=1 the EPT type is WB + IPAT, and when CR0.CD=0 + mtrr enabled, EPT type is WB or UC or ..., which are without IPAT, then we have to always zap all EPT entries. Given removing the IPAT bit when CR0.CD=1 only makes the quirk KVM_X86_QUIRK_CD_NW_CLEARED more strict (meaning it could be WC/UC... if the guest PAT overwrites it), it's still acceptable. On the other hand, from the guest's point of view, it sees the GPA is UC with CR0.CD=1. So, if we want to align host EPT memtype with guest's view, we have to drop the quirk KVM_X86_QUIRK_CD_NW_CLEARED, which, however, will impact the guest bootup performance dramatically and is not adopted in any VM. So, we remove the IPAT bit when CR0.CD=1 with the quirk KVM_X86_QUIRK_CD_NW_CLEARED to make it stricter and to enable later optimization. > > >stronger than WB as WB is the weakest memtype. However, this change is > >acceptable as it doesn't make the memory type weaker, > > >consider without > >this quirk, the original memtype for cache disabled is UC + IPAT. > > This change impacts only the case where the quirk is enabled. Maybe you > mean: > > _with_ the quirk, the original memtype for cached disabled is _WB_ + IPAT. > Uh, I mean originally without the quirk, UC + IPAT should be returned, which is the correct value to return. I can explain the full background more clearly in the next version. Thanks > > > > >Suggested-by: Sean Christopherson > >Signed-off-by: Yan Zhao > >--- > > arch/x86/kvm/vmx/vmx.c | 9 +++------ > > 1 file changed, 3 insertions(+), 6 deletions(-) > > > >diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > >index 0ecf4be2c6af..c1e93678cea4 100644 > >--- a/arch/x86/kvm/vmx/vmx.c > >+++ b/arch/x86/kvm/vmx/vmx.c > >@@ -7548,8 +7548,6 @@ static int vmx_vm_init(struct kvm *kvm) > > > > static u8 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio) > > { > >- u8 cache; > >- > > /* We wanted to honor guest CD/MTRR/PAT, but doing so could result in > > * memory aliases with conflicting memory types and sometimes MCEs. > > * We have to be careful as to what are honored and when. > >@@ -7576,11 +7574,10 @@ static u8 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio) > > > > if (kvm_read_cr0_bits(vcpu, X86_CR0_CD)) { > > if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED)) > >- cache = MTRR_TYPE_WRBACK; > >+ return MTRR_TYPE_WRBACK << VMX_EPT_MT_EPTE_SHIFT; > > Shouldn't KVM honor guest MTRRs as well? i.e., as if CR0.CD isn't set. > > > else > >- cache = MTRR_TYPE_UNCACHABLE; > >- > >- return (cache << VMX_EPT_MT_EPTE_SHIFT) | VMX_EPT_IPAT_BIT; > >+ return (MTRR_TYPE_UNCACHABLE << VMX_EPT_MT_EPTE_SHIFT) | > >+ VMX_EPT_IPAT_BIT; > > } > > > > return kvm_mtrr_get_guest_memory_type(vcpu, gfn) << VMX_EPT_MT_EPTE_SHIFT; > >-- > >2.17.1 > >