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Date:   Tue, 20 Jun 2023 07:08:15 +0200
From:   Juerg Haefliger <juerg.haefliger@canonical.com>
To:     Akhil P Oommen <quic_akhilpo@quicinc.com>
Cc:     <robdclark@gmail.com>, <quic_abhinavk@quicinc.com>,
        <dmitry.baryshkov@linaro.org>, <sean@poorly.run>,
        <airlied@gmail.com>, <daniel@ffwll.ch>,
        <linux-arm-msm@vger.kernel.org>, <dri-devel@lists.freedesktop.org>,
        <freedreno@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>,
        <johan+linaro@kernel.org>, <konrad.dybcio@linaro.org>,
        <ribalda@chromium.org>, <joel@joelfernandes.org>
Subject: Re: [PATCH] drm/msm/adreno: Update MODULE_FIRMWARE macros
Message-ID: <20230620070815.2c0bd60f@smeagol>
In-Reply-To: <yl7qxypdzlzwmmp3b43vz5xo6jxey4zcpdxurcvfzujxrawz36@lneajulwoy4k>
References: <20230616122815.1037425-1-juerg.haefliger@canonical.com>
        <yl7qxypdzlzwmmp3b43vz5xo6jxey4zcpdxurcvfzujxrawz36@lneajulwoy4k>
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Content-Type: multipart/signed; boundary="Sig_/vDXuG4klP3vp2xxWUE+QEvn";
 protocol="application/pgp-signature"; micalg=pgp-sha512
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--Sig_/vDXuG4klP3vp2xxWUE+QEvn
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: quoted-printable

On Fri, 16 Jun 2023 21:25:01 +0530
Akhil P Oommen <quic_akhilpo@quicinc.com> wrote:

> On Fri, Jun 16, 2023 at 02:28:15PM +0200, Juerg Haefliger wrote:
> >=20
> > Add missing MODULE_FIRMWARE macros and remove some for firmwares that
> > the driver no longer references.
> >=20
> > Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com>
> > ---
> >  drivers/gpu/drm/msm/adreno/adreno_device.c | 23 ++++++++++++++++++----
> >  1 file changed, 19 insertions(+), 4 deletions(-)
> >=20
> > diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/d=
rm/msm/adreno/adreno_device.c
> > index 8cff86e9d35c..9f70d7c1a72a 100644
> > --- a/drivers/gpu/drm/msm/adreno/adreno_device.c
> > +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
> > @@ -364,17 +364,32 @@ MODULE_FIRMWARE("qcom/a330_pm4.fw");
> >  MODULE_FIRMWARE("qcom/a330_pfp.fw");
> >  MODULE_FIRMWARE("qcom/a420_pm4.fw");
> >  MODULE_FIRMWARE("qcom/a420_pfp.fw");
> > +MODULE_FIRMWARE("qcom/a506_zap.mdt");
> > +MODULE_FIRMWARE("qcom/a508_zap.mdt");
> > +MODULE_FIRMWARE("qcom/a512_zap.mdt");
> >  MODULE_FIRMWARE("qcom/a530_pm4.fw");
> >  MODULE_FIRMWARE("qcom/a530_pfp.fw");
> >  MODULE_FIRMWARE("qcom/a530v3_gpmu.fw2");
> >  MODULE_FIRMWARE("qcom/a530_zap.mdt");
> > -MODULE_FIRMWARE("qcom/a530_zap.b00");
> > -MODULE_FIRMWARE("qcom/a530_zap.b01");
> > -MODULE_FIRMWARE("qcom/a530_zap.b02"); =20
> Why are these not required when "qcom/a530_zap.mdt" is present?
>=20
> mdt & b0* binaries are different partitions of the same secure
> firmware. Even though we specify only the .mdt file here, the PIL driver
> will load the *.b0* file automatically. OTOH, "*.mbn" is a standalone
> unified binary format.

Ah thanks for the clarification.


> If the requirement is to ensure that all necessary firmwares are part of
> your distribution, you should include the *.b0* files too here.

I'll look into that. IMO, everything that the drivers can load should be
listed for completeness.

...Juerg


> -Akhil
>=20
> > +MODULE_FIRMWARE("qcom/a540_gpmu.fw2");
> > +MODULE_FIRMWARE("qcom/a540_zap.mdt");
> > +MODULE_FIRMWARE("qcom/a615_zap.mdt");
> >  MODULE_FIRMWARE("qcom/a619_gmu.bin");
> >  MODULE_FIRMWARE("qcom/a630_sqe.fw");
> >  MODULE_FIRMWARE("qcom/a630_gmu.bin");
> > -MODULE_FIRMWARE("qcom/a630_zap.mbn");
> > +MODULE_FIRMWARE("qcom/a630_zap.mdt");
> > +MODULE_FIRMWARE("qcom/a640_gmu.bin");
> > +MODULE_FIRMWARE("qcom/a640_zap.mdt");
> > +MODULE_FIRMWARE("qcom/a650_gmu.bin");
> > +MODULE_FIRMWARE("qcom/a650_sqe.fw");
> > +MODULE_FIRMWARE("qcom/a650_zap.mdt");
> > +MODULE_FIRMWARE("qcom/a660_gmu.bin");
> > +MODULE_FIRMWARE("qcom/a660_sqe.fw");
> > +MODULE_FIRMWARE("qcom/a660_zap.mdt");
> > +MODULE_FIRMWARE("qcom/leia_pfp_470.fw");
> > +MODULE_FIRMWARE("qcom/leia_pm4_470.fw");
> > +MODULE_FIRMWARE("qcom/yamato_pfp.fw");
> > +MODULE_FIRMWARE("qcom/yamato_pm4.fw");
> > =20
> >  static inline bool _rev_match(uint8_t entry, uint8_t id)
> >  {
> > --=20
> > 2.37.2
> >  =20


--Sig_/vDXuG4klP3vp2xxWUE+QEvn
Content-Type: application/pgp-signature
Content-Description: OpenPGP digital signature

-----BEGIN PGP SIGNATURE-----

iQIzBAEBCgAdFiEEhZfU96IuprviLdeLD9OLCQumQrcFAmSRND8ACgkQD9OLCQum
QrdPYw//QzGQ0R5KDY7yYZt83rqtfWawMZuuBi9PMkzDHZWRYkFYdmeVGDdxtAm4
od/7vmulM8dUSjdiTvbSmnxi4kapgysgi9xFpZ6y998+V/FPlFU7bYAbjV43c0xo
2WeklNS4fKaoJg0jVMbVFegQIRENqKj9xwqbNHlDKhPNRELiU7lpMDRBJalzICdi
FuwZvGv59ah+voSxHNpo0e9et659RjgqxvxlS7ivWLR/gimoCURRXj+oLD3nKtav
ibG704hNsnEPqGvf9NQi+C3NTMZPF123EpiXyNQoe6J158Xg6dgur0oBPyn97TFX
rrsm+9usyGPzfrwdtwdz9OtqL0wCT9uOD12W+E8MqVBryU8HHRdCt/ZQkkJ5sz1V
6+wHya9PseGN5zCRBOr+flAjRmfNDCLcveB06BmhXSEUk1CmPHhJvUAfKgrMMK+n
R0BUF+V2/r82AcPQpx1rNuPWeEeSsgGwq/gq+Bbp8lJB9BYm/IDst9fch711WV70
70AsC5zdSN/E75TJpQ9qqG/ZafWzPoI5YhYx6MOIHxwvmFBgSBLHUqCrSSVargjF
qAYkTizvh4BMknx5hL+XfReFriTRkU93eyTHwOkXFN5BTKPFFIWSA6CFF+1+wiNy
GYQ8qgldRA6YZFXjF3FN/+oTAmwzjp/ZBgAI1C36IVWqinwjXV4=
=rUQw
-----END PGP SIGNATURE-----

--Sig_/vDXuG4klP3vp2xxWUE+QEvn--