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References: <20230620091603.269-1-ravi.bangoria@amd.com>
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From:   Ian Rogers <irogers@google.com>
Date:   Tue, 20 Jun 2023 09:44:45 -0700
Message-ID: <CAP-5=fXS726wY1taYEYXDz3YZ4ZwxcL+nhh_yNM7rwamMd8mWg@mail.gmail.com>
Subject: Re: [PATCH] perf/amd: Prevent grouping of IBS events
To:     Ravi Bangoria <ravi.bangoria@amd.com>
Cc:     peterz@infradead.org, acme@kernel.org, jolsa@kernel.org,
        namhyung@kernel.org, bp@alien8.de, x86@kernel.org,
        linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
        sandipan.das@amd.com, ananth.narayan@amd.com,
        santosh.shukla@amd.com
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On Tue, Jun 20, 2023 at 2:16=E2=80=AFAM Ravi Bangoria <ravi.bangoria@amd.co=
m> wrote:
>
> IBS PMUs can have only one event active at any point in time. Restrict
> grouping of multiple IBS events.

Thanks Ravi,

can you provide an example/test for this? Should this be a weak group issue=
?

Thanks,
Ian

> Reported-by: Sandipan Das <sandipan.das@amd.com>
> Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
> ---
>  arch/x86/events/amd/ibs.c | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
>
> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
> index 371014802191..74e664266753 100644
> --- a/arch/x86/events/amd/ibs.c
> +++ b/arch/x86/events/amd/ibs.c
> @@ -247,11 +247,33 @@ int forward_event_to_ibs(struct perf_event *event)
>         return -ENOENT;
>  }
>
> +/*
> + * Grouping of IBS events is not possible since IBS can have only
> + * one event active at any point in time.
> + */
> +static int validate_group(struct perf_event *event)
> +{
> +       struct perf_event *sibling;
> +
> +       if (event->group_leader =3D=3D event)
> +               return 0;
> +
> +       if (event->group_leader->pmu =3D=3D event->pmu)
> +               return -EINVAL;
> +
> +       for_each_sibling_event(sibling, event->group_leader) {
> +               if (sibling->pmu =3D=3D event->pmu)
> +                       return -EINVAL;
> +       }
> +       return 0;
> +}
> +
>  static int perf_ibs_init(struct perf_event *event)
>  {
>         struct hw_perf_event *hwc =3D &event->hw;
>         struct perf_ibs *perf_ibs;
>         u64 max_cnt, config;
> +       int ret;
>
>         perf_ibs =3D get_ibs_pmu(event->attr.type);
>         if (!perf_ibs)
> @@ -265,6 +287,10 @@ static int perf_ibs_init(struct perf_event *event)
>         if (config & ~perf_ibs->config_mask)
>                 return -EINVAL;
>
> +       ret =3D validate_group(event);
> +       if (ret)
> +               return ret;
> +
>         if (hwc->sample_period) {
>                 if (config & perf_ibs->cnt_mask)
>                         /* raw max_cnt may not be set */
> --
> 2.41.0
>