Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Message-ID: <0b663d8f6802e8dbf443397718234bcb6d0811c8.camel@xry111.site>
Subject: A question about prefetchw detection in "x86/asm: Cleanup prefetch
 primitives"
From:   Xi Ruoyao <xry111@xry111.site>
To:     x86@kernel.org
Cc:     linux-kernel@vger.kernel.org, Thomas Gleixner <tglx@linutronix.de>,
        Borislav Petkov <bp@suse.de>
Date:   Wed, 21 Jun 2023 18:57:40 +0800
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
User-Agent: Evolution 3.48.3 
MIME-Version: 1.0
Precedence: bulk

Hi,

In commit a930dc4543a2 ("x86/asm: Cleanup prefetch primitives"), a chunk
of code was added:

	/* 3DNow or LM implies PREFETCHW */
	if (!cpu_has(c, X86_FEATURE_3DNOWPREFETCH))
		if (cpu_has(c, X86_FEATURE_3DNOW) || cpu_has(c, X86_FEATURE_LM))
			set_cpu_cap(c, X86_FEATURE_3DNOWPREFETCH);

But Glibc does not contain a similar logic in the CPU feature detection
code, causing a test failure on old CPUs
(https://sourceware.org/bugzilla/show_bug.cgi?id=3D30328).

I intend to implement the same logic for Glibc.  I can understand "3DNow
implies PREFETCHW", but is there a bibliographical reference about "LM
implies PREFETCHW" so I can convince the Glibc maintainers for the
change?

--=20
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University